| Message ID | 1632808827-6109-1-git-send-email-ashok.reddy.soma@xilinx.com |
|---|---|
| State | Accepted |
| Commit | 1db1acbb848ef1b10eccedb52edd6c37078bbd38 |
| Delegated to: | Michal Simek |
| Headers | show |
| Series | clk: versal: Enable only GATE type clocks | expand |
On 9/28/21 8:00 AM, Ashok Reddy Soma wrote: > From: T Karthik Reddy <t.karthik.reddy@xilinx.com> > > Clocks should be enabled or disabled only if they are of GATE type > clocks. If they are not of GATE type clocks, don't touch them. > > Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> > Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> > --- > > drivers/clk/clk_versal.c | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/drivers/clk/clk_versal.c b/drivers/clk/clk_versal.c > index 62523d2909..a9dd57b098 100644 > --- a/drivers/clk/clk_versal.c > +++ b/drivers/clk/clk_versal.c > @@ -725,7 +725,10 @@ static int versal_clk_enable(struct clk *clk) > > clk_id = priv->clk[clk->id].clk_id; > > - return xilinx_pm_request(PM_CLOCK_ENABLE, clk_id, 0, 0, 0, NULL); > + if (versal_clock_gate(clk_id)) > + return xilinx_pm_request(PM_CLOCK_ENABLE, clk_id, 0, 0, 0, NULL); > + > + return 0; > } > > static struct clk_ops versal_clk_ops = { > Applied. M
diff --git a/drivers/clk/clk_versal.c b/drivers/clk/clk_versal.c index 62523d2909..a9dd57b098 100644 --- a/drivers/clk/clk_versal.c +++ b/drivers/clk/clk_versal.c @@ -725,7 +725,10 @@ static int versal_clk_enable(struct clk *clk) clk_id = priv->clk[clk->id].clk_id; - return xilinx_pm_request(PM_CLOCK_ENABLE, clk_id, 0, 0, 0, NULL); + if (versal_clock_gate(clk_id)) + return xilinx_pm_request(PM_CLOCK_ENABLE, clk_id, 0, 0, 0, NULL); + + return 0; } static struct clk_ops versal_clk_ops = {