| Message ID | 1560413843-3390-1-git-send-email-ley.foon.tan@intel.com |
|---|---|
| State | Accepted |
| Commit | b861cfb53c58e06513c3d4518a0d4e5ca57ec2ee |
| Delegated to: | Marek Vasut |
| Headers | show |
| Series | [U-Boot] arm: dts: Stratix10: Enable i2c | expand |
On Thu, Jun 13, 2019 at 10:17 AM Ley Foon Tan <ley.foon.tan@intel.com> wrote: > > Enable i2c1 in Stratix 10 devkit. > > SOCFPGA_STRATIX10 # i2c bus > Bus 0: i2c@ffc02900 > SOCFPGA_STRATIX10 # i2c dev 0 > Setting bus to 0 > SOCFPGA_STRATIX10 # i2c probe > Valid chip addresses: 14 4C 51 68 74 > > Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> > --- > arch/arm/dts/socfpga_stratix10_socdk.dts | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/arch/arm/dts/socfpga_stratix10_socdk.dts b/arch/arm/dts/socfpga_stratix10_socdk.dts > index 2745050810..c5409df026 100755 > --- a/arch/arm/dts/socfpga_stratix10_socdk.dts > +++ b/arch/arm/dts/socfpga_stratix10_socdk.dts > @@ -9,6 +9,7 @@ > model = "SoCFPGA Stratix 10 SoCDK"; > > aliases { > + i2c0 = &i2c1; > serial0 = &uart0; > }; > > @@ -77,6 +78,10 @@ > }; > }; > > +&i2c1 { > + status = "okay"; > +}; > + > &mmc { > status = "okay"; > cap-sd-highspeed; > -- > 2.19.0 >
On 6/13/19 10:17 AM, Ley Foon Tan wrote: > Enable i2c1 in Stratix 10 devkit. > > SOCFPGA_STRATIX10 # i2c bus > Bus 0: i2c@ffc02900 > SOCFPGA_STRATIX10 # i2c dev 0 > Setting bus to 0 > SOCFPGA_STRATIX10 # i2c probe > Valid chip addresses: 14 4C 51 68 74 > > Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> > --- > arch/arm/dts/socfpga_stratix10_socdk.dts | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/arch/arm/dts/socfpga_stratix10_socdk.dts b/arch/arm/dts/socfpga_stratix10_socdk.dts > index 2745050810..c5409df026 100755 > --- a/arch/arm/dts/socfpga_stratix10_socdk.dts > +++ b/arch/arm/dts/socfpga_stratix10_socdk.dts > @@ -9,6 +9,7 @@ > model = "SoCFPGA Stratix 10 SoCDK"; > > aliases { > + i2c0 = &i2c1; > serial0 = &uart0; > }; > > @@ -77,6 +78,10 @@ > }; > }; > > +&i2c1 { > + status = "okay"; > +}; > + > &mmc { > status = "okay"; > cap-sd-highspeed; > Applied, thanks.
diff --git a/arch/arm/dts/socfpga_stratix10_socdk.dts b/arch/arm/dts/socfpga_stratix10_socdk.dts index 2745050810..c5409df026 100755 --- a/arch/arm/dts/socfpga_stratix10_socdk.dts +++ b/arch/arm/dts/socfpga_stratix10_socdk.dts @@ -9,6 +9,7 @@ model = "SoCFPGA Stratix 10 SoCDK"; aliases { + i2c0 = &i2c1; serial0 = &uart0; }; @@ -77,6 +78,10 @@ }; }; +&i2c1 { + status = "okay"; +}; + &mmc { status = "okay"; cap-sd-highspeed;
Enable i2c1 in Stratix 10 devkit. SOCFPGA_STRATIX10 # i2c bus Bus 0: i2c@ffc02900 SOCFPGA_STRATIX10 # i2c dev 0 Setting bus to 0 SOCFPGA_STRATIX10 # i2c probe Valid chip addresses: 14 4C 51 68 74 Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> --- arch/arm/dts/socfpga_stratix10_socdk.dts | 5 +++++ 1 file changed, 5 insertions(+)