| Message ID | 1471418009-12660-7-git-send-email-hs@denx.de |
|---|---|
| State | Changes Requested |
| Delegated to: | Andreas Bießmann |
| Headers | show |
Hi Heiko, > -----Original Message----- > From: U-Boot [mailto:u-boot-bounces@lists.denx.de] On Behalf Of Heiko > Schocher > Sent: 2016年8月17日 15:13 > To: U-Boot Mailing List <u-boot@lists.denx.de> > Cc: Bo Shen <voice.shen@atmel.com> > Subject: [U-Boot] [PATCH 6/6] [RFC] at91: SPL clock fix for AT91SAM9G15 > based boards. > > on a at91sam9g15 basd board I need another MOR register init as common for > at91 based boards. Changes: > MM > - set AT91_PMC_MOR_KEY to 0x37, without this writting has > no effect to tthis register. > - AT91_PMC_MOR_OSCOUNT to 0 > - set AT91_PMC_MOR_MOSCEN and AT91_PMC_MOR_MOSCSEL > > Signed-off-by: Heiko Schocher <hs@denx.de> > > --- > I post this as a RFC patch, because this settings may break other boards ... so if > this is not a valid common setting, I propose to make this setting board > configurable through a weak function ... > > arch/arm/mach-at91/spl_at91.c | 13 ++++++++++--- > 1 file changed, 10 insertions(+), 3 deletions(-) > > diff --git a/arch/arm/mach-at91/spl_at91.c b/arch/arm/mach-at91/spl_at91.c index > cc3341a..4d8ed26 100644 > --- a/arch/arm/mach-at91/spl_at91.c > +++ b/arch/arm/mach-at91/spl_at91.c > @@ -31,13 +31,20 @@ static void enable_ext_reset(void) void > lowlevel_clock_init(void) { > struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; > + u32 tmp; > > if (!(readl(&pmc->sr) & AT91_PMC_MOSCS)) { > - /* Enable Main Oscillator */ > - writel(AT91_PMC_MOSCS | (0x40 << 8), &pmc->mor); > + tmp = readl(&pmc->mor); > + tmp &= ~AT91_PMC_MOR_OSCOUNT(0xff); > + tmp &= ~AT91_PMC_MOR_KEY(0xff); > + tmp |= AT91_PMC_MOR_MOSCEN; > + tmp |= AT91_PMC_MOR_MOSCSEL; > + tmp |= AT91_PMC_MOR_OSCOUNT(0); > + tmp |= AT91_PMC_MOR_KEY(0x37); > + writel(tmp, &pmc->mor); I think, it needs two steps to configure the CKGR_MOR register. 1./ set AT91_PMC_MOR_MOSCEN, then wait to check the MOSCXTS bit of the PMC Status Register. 2./ set AT91_PMC_MOR_MOSCSEL, then wait for check the MOSCSLES bit of the PMC Status Register. AT91_PMC_MOR_OSCOUNT should not be set 0. > > /* Wait until Main Oscillator is stable */ > - while (!(readl(&pmc->sr) & AT91_PMC_MOSCS)) > + while (!(readl(&pmc->sr) & AT91_PMC_IXR_MOSCS)) > ; > } > > -- > 2.5.5 > > _______________________________________________ > U-Boot mailing list > U-Boot@lists.denx.de > http://lists.denx.de/mailman/listinfo/u-boot Best Regards, Wenyou Yang
Hi Heiko, On 17.08.16 09:13, Heiko Schocher wrote: > on a at91sam9g15 basd board I need another MOR register > init as common for at91 based boards. Changes: > > - set AT91_PMC_MOR_KEY to 0x37, without this writting has > no effect to tthis register. > - AT91_PMC_MOR_OSCOUNT to 0 > - set AT91_PMC_MOR_MOSCEN and AT91_PMC_MOR_MOSCSEL > > Signed-off-by: Heiko Schocher <hs@denx.de> > > --- > I post this as a RFC patch, because this settings may > break other boards ... so if this is not a valid common > setting, I propose to make this setting board configurable > through a weak function ... > > arch/arm/mach-at91/spl_at91.c | 13 ++++++++++--- > 1 file changed, 10 insertions(+), 3 deletions(-) > > diff --git a/arch/arm/mach-at91/spl_at91.c b/arch/arm/mach-at91/spl_at91.c > index cc3341a..4d8ed26 100644 > --- a/arch/arm/mach-at91/spl_at91.c > +++ b/arch/arm/mach-at91/spl_at91.c > @@ -31,13 +31,20 @@ static void enable_ext_reset(void) > void lowlevel_clock_init(void) > { > struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; > + u32 tmp; > > if (!(readl(&pmc->sr) & AT91_PMC_MOSCS)) { > - /* Enable Main Oscillator */ > - writel(AT91_PMC_MOSCS | (0x40 << 8), &pmc->mor); > + tmp = readl(&pmc->mor); > + tmp &= ~AT91_PMC_MOR_OSCOUNT(0xff); > + tmp &= ~AT91_PMC_MOR_KEY(0xff); > + tmp |= AT91_PMC_MOR_MOSCEN; > + tmp |= AT91_PMC_MOR_MOSCSEL; > + tmp |= AT91_PMC_MOR_OSCOUNT(0); this is weird configuration to me. Why do you set the counter to 0? Is the Oscillator really immediately stable? Or is it an external Oscillator which should be bypassed? Nevertheless, you should do a two step procedure here according to PMC Programming Sequence. First switching the Oscillator on and second activate the master clock from it. Each of the steps may poll the status register for appropriate flags (or use interrupts). Any chance to merge this lowlevel clock init with spl_atmel? At least this part for enabling main oscillator. Andreas > + tmp |= AT91_PMC_MOR_KEY(0x37); > + writel(tmp, &pmc->mor); > > /* Wait until Main Oscillator is stable */ > - while (!(readl(&pmc->sr) & AT91_PMC_MOSCS)) > + while (!(readl(&pmc->sr) & AT91_PMC_IXR_MOSCS)) > ; > } > >
diff --git a/arch/arm/mach-at91/spl_at91.c b/arch/arm/mach-at91/spl_at91.c index cc3341a..4d8ed26 100644 --- a/arch/arm/mach-at91/spl_at91.c +++ b/arch/arm/mach-at91/spl_at91.c @@ -31,13 +31,20 @@ static void enable_ext_reset(void) void lowlevel_clock_init(void) { struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; + u32 tmp; if (!(readl(&pmc->sr) & AT91_PMC_MOSCS)) { - /* Enable Main Oscillator */ - writel(AT91_PMC_MOSCS | (0x40 << 8), &pmc->mor); + tmp = readl(&pmc->mor); + tmp &= ~AT91_PMC_MOR_OSCOUNT(0xff); + tmp &= ~AT91_PMC_MOR_KEY(0xff); + tmp |= AT91_PMC_MOR_MOSCEN; + tmp |= AT91_PMC_MOR_MOSCSEL; + tmp |= AT91_PMC_MOR_OSCOUNT(0); + tmp |= AT91_PMC_MOR_KEY(0x37); + writel(tmp, &pmc->mor); /* Wait until Main Oscillator is stable */ - while (!(readl(&pmc->sr) & AT91_PMC_MOSCS)) + while (!(readl(&pmc->sr) & AT91_PMC_IXR_MOSCS)) ; }
on a at91sam9g15 basd board I need another MOR register init as common for at91 based boards. Changes: - set AT91_PMC_MOR_KEY to 0x37, without this writting has no effect to tthis register. - AT91_PMC_MOR_OSCOUNT to 0 - set AT91_PMC_MOR_MOSCEN and AT91_PMC_MOR_MOSCSEL Signed-off-by: Heiko Schocher <hs@denx.de> --- I post this as a RFC patch, because this settings may break other boards ... so if this is not a valid common setting, I propose to make this setting board configurable through a weak function ... arch/arm/mach-at91/spl_at91.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-)