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[U-Boot,v2] ARM: uniphier: insert dsb barrier to ensure visibility of store

Message ID 1465376552-28129-1-git-send-email-yamada.masahiro@socionext.com
State Accepted
Commit 9c2f9b2da650907b928995350cc4e29480fb0f80
Delegated to: Masahiro Yamada
Headers show

Commit Message

Masahiro Yamada June 8, 2016, 9:02 a.m. UTC
I noticed secondary CPUs sometimes fail to wake up, and the root
cause is that the sev instruction wakes up slave CPUs before the
preceding the register write is observed by them.

The read-back of the accessed register does not guarantee the order.
In order to ensure the order between the register write and the sev
instruction, a dsb instruction should be executed prior to the sev.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---

Changes in v2:
  - Use "dsb ishst" instead of "dsb sy"

 arch/arm/mach-uniphier/arm64/smp_kick_cpus.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Masahiro Yamada June 8, 2016, 11:24 p.m. UTC | #1
2016-06-08 18:02 GMT+09:00 Masahiro Yamada <yamada.masahiro@socionext.com>:
> I noticed secondary CPUs sometimes fail to wake up, and the root
> cause is that the sev instruction wakes up slave CPUs before the
> preceding the register write is observed by them.
>
> The read-back of the accessed register does not guarantee the order.
> In order to ensure the order between the register write and the sev
> instruction, a dsb instruction should be executed prior to the sev.
>
> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>


Applied to u-boot-uniphier/master.
diff mbox

Patch

diff --git a/arch/arm/mach-uniphier/arm64/smp_kick_cpus.c b/arch/arm/mach-uniphier/arm64/smp_kick_cpus.c
index 64412e0..5971ad2 100644
--- a/arch/arm/mach-uniphier/arm64/smp_kick_cpus.c
+++ b/arch/arm/mach-uniphier/arm64/smp_kick_cpus.c
@@ -21,11 +21,11 @@  void uniphier_smp_kick_all_cpus(void)
 	rom_boot_rsv0 = map_sysmem(UNIPHIER_SMPCTRL_ROM_RSV0, SZ_8);
 
 	writeq((u64)uniphier_secondary_startup, rom_boot_rsv0);
-	readq(rom_boot_rsv0);	/* relax */
 
 	unmap_sysmem(rom_boot_rsv0);
 
 	uniphier_smp_setup();
 
-	asm("sev"); /* Bring up all secondary CPUs from Boot ROM into U-Boot */
+	asm("dsb	ishst\n" /* Ensure the write to ROM_RSV0 is visible */
+	    "sev"); /* Bring up all secondary CPUs from Boot ROM into U-Boot */
 }