| Message ID | 1453072320-24298-29-git-send-email-sjg@chromium.org |
|---|---|
| State | Accepted |
| Commit | 887cba8f38e237735bb1d84b34dfbbf032e5b6b6 |
| Delegated to: | Bin Meng |
| Headers | show |
On Mon, Jan 18, 2016 at 7:11 AM, Simon Glass <sjg@chromium.org> wrote: > This is done by default with PCI auto-config. Drop it. > > Signed-off-by: Simon Glass <sjg@chromium.org> > --- > > Changes in v2: > - Rename from 'Move northbridge setup to the northbridge driver' > - Drop this unnecessary init > > arch/x86/cpu/ivybridge/pci.c | 20 -------------------- > 1 file changed, 20 deletions(-) > Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
On Thu, Jan 21, 2016 at 2:57 PM, Bin Meng <bmeng.cn@gmail.com> wrote: > On Mon, Jan 18, 2016 at 7:11 AM, Simon Glass <sjg@chromium.org> wrote: >> This is done by default with PCI auto-config. Drop it. >> >> Signed-off-by: Simon Glass <sjg@chromium.org> >> --- >> >> Changes in v2: >> - Rename from 'Move northbridge setup to the northbridge driver' >> - Drop this unnecessary init >> >> arch/x86/cpu/ivybridge/pci.c | 20 -------------------- >> 1 file changed, 20 deletions(-) >> > > Reviewed-by: Bin Meng <bmeng.cn@gmail.com> applied to u-boot-x86/master, thanks!
diff --git a/arch/x86/cpu/ivybridge/pci.c b/arch/x86/cpu/ivybridge/pci.c index 8af99b4..b081469 100644 --- a/arch/x86/cpu/ivybridge/pci.c +++ b/arch/x86/cpu/ivybridge/pci.c @@ -19,32 +19,12 @@ static int pci_ivybridge_probe(struct udevice *bus) { - struct pci_controller *hose = dev_get_uclass_priv(bus); - pci_dev_t dev; - u16 reg16; - if (!(gd->flags & GD_FLG_RELOC)) return 0; post_code(0x50); bd82x6x_init_extra(); post_code(0x51); - reg16 = 0xff; - dev = PCH_DEV; - reg16 = x86_pci_read_config16(dev, PCI_COMMAND); - reg16 |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY; - x86_pci_write_config16(dev, PCI_COMMAND, reg16); - - /* - * Clear non-reserved bits in status register. - */ - pci_hose_write_config_word(hose, dev, PCI_STATUS, 0xffff); - pci_hose_write_config_byte(hose, dev, PCI_LATENCY_TIMER, 0x80); - pci_hose_write_config_byte(hose, dev, PCI_CACHE_LINE_SIZE, 0x08); - - pci_write_bar32(hose, dev, 0, 0xf0000000); - post_code(0x52); - return 0; }
This is done by default with PCI auto-config. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> --- Changes in v2: - Rename from 'Move northbridge setup to the northbridge driver' - Drop this unnecessary init arch/x86/cpu/ivybridge/pci.c | 20 -------------------- 1 file changed, 20 deletions(-)