| Message ID | 1448512881-12582-1-git-send-email-yorksun@freescale.com |
|---|---|
| State | Accepted |
| Delegated to: | York Sun |
| Headers | show |
On 11/25/2015 08:41 PM, York Sun wrote: > The early MMU table doesn't enable all addresses. Unused addresses > are marked as invalid, as introduced by commit 9979922. An entry > was missing for NAND flash space, causing nand boot failure. > > Signed-off-by: York Sun <yorksun@freescale.com> > CC: Alison Wang <alison.wang@freescale.com> > CC: Prabhakar Kushwaha <prabhakar@freescale.com> > > --- > > Changes in v2: > Reduce the IFC mapped for early MMU, up to NOR flash base to > avoid conflict > Tested on LS2085AQDS > > arch/arm/include/asm/arch-fsl-layerscape/cpu.h | 4 ++++ > 1 file changed, 4 insertions(+) Applied to fsl-qoriq master. York
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h index 727fd24..4544094 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h @@ -130,6 +130,10 @@ static const struct sys_mmu_table early_mmu_table[] = { CONFIG_SYS_FSL_IFC_SIZE1, MT_DEVICE_NGNRNE, PMD_SECT_NON_SHARE }, { CONFIG_SYS_FSL_DRAM_BASE1, CONFIG_SYS_FSL_DRAM_BASE1, CONFIG_SYS_FSL_DRAM_SIZE1, MT_NORMAL, PMD_SECT_OUTER_SHARE }, + /* Map IFC region #2 up to CONFIG_SYS_FLASH_BASE for NAND boot */ + { CONFIG_SYS_FSL_IFC_BASE2, CONFIG_SYS_FSL_IFC_BASE2, + CONFIG_SYS_FLASH_BASE - CONFIG_SYS_FSL_IFC_BASE2, + MT_DEVICE_NGNRNE, PMD_SECT_NON_SHARE }, { CONFIG_SYS_FSL_DCSR_BASE, CONFIG_SYS_FSL_DCSR_BASE, CONFIG_SYS_FSL_DCSR_SIZE, MT_DEVICE_NGNRNE, PMD_SECT_NON_SHARE | PMD_SECT_PXN | PMD_SECT_UXN },
The early MMU table doesn't enable all addresses. Unused addresses are marked as invalid, as introduced by commit 9979922. An entry was missing for NAND flash space, causing nand boot failure. Signed-off-by: York Sun <yorksun@freescale.com> CC: Alison Wang <alison.wang@freescale.com> CC: Prabhakar Kushwaha <prabhakar@freescale.com> --- Changes in v2: Reduce the IFC mapped for early MMU, up to NOR flash base to avoid conflict Tested on LS2085AQDS arch/arm/include/asm/arch-fsl-layerscape/cpu.h | 4 ++++ 1 file changed, 4 insertions(+)