Message ID | 1447159252-10828-1-git-send-email-fabio.estevam@freescale.com |
---|---|
State | Rejected |
Delegated to: | Albert ARIBAUD |
Headers | show |
Hi Fabio, On 10 November 2015 at 04:40, Fabio Estevam <fabio.estevam@freescale.com> wrote: > This reverts commit 5ba534d247d418e09c5b4fe5fb7fa780aac08e49. > > This commit causes cgtqmx6eval to not boot anymore: > > U-Boot SPL 2015.10-00527-g8800bee (Nov 09 2015 - 21:23:54) > mxc_spi: SPI Slave not allocated ! > > Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> > --- > arch/arm/lib/crt0.S | 28 ++++++++++++++++++++++++---- > 1 file changed, 24 insertions(+), 4 deletions(-) We're at the very start the release process, so I wonder if we can try to figure out what is wrong here? Is it because malloc() is not working, perhaps? The C code should be roughly equivalent to the assembly code. Albert found a problem with the code on toolchain 5.2.1 to do with setting 'gd', so may have some thoughts on this. But this might be a different problem. > > diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S > index 80548eb..4c3a94a 100644 > --- a/arch/arm/lib/crt0.S > +++ b/arch/arm/lib/crt0.S > @@ -82,11 +82,31 @@ ENTRY(_main) > #else > bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ > #endif > - mov r0, sp > - bl board_init_f_mem > - mov sp, r0 > - > + mov r2, sp > + sub sp, sp, #GD_SIZE /* allocate one GD above SP */ > +#if defined(CONFIG_CPU_V7M) /* v7M forbids using SP as BIC destination */ > + mov r3, sp > + bic r3, r3, #7 > + mov sp, r3 > +#else > + bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ > +#endif > + mov r9, sp /* GD is above SP */ > + mov r1, sp > mov r0, #0 > +clr_gd: > + cmp r1, r2 /* while not at end of GD */ > +#if defined(CONFIG_CPU_V7M) > + itt lo > +#endif > + strlo r0, [r1] /* clear 32-bit GD word */ > + addlo r1, r1, #4 /* move to next */ > + blo clr_gd > +#if defined(CONFIG_SYS_MALLOC_F_LEN) > + sub sp, sp, #CONFIG_SYS_MALLOC_F_LEN > + str sp, [r9, #GD_MALLOC_BASE] > +#endif > + /* mov r0, #0 not needed due to above code */ > bl board_init_f > > #if ! defined(CONFIG_SPL_BUILD) > -- > 1.9.1 > Regards, Simon
Hello Simon, On Tue, 10 Nov 2015 06:41:25 -0800, Simon Glass <sjg@chromium.org> wrote: > Hi Fabio, > > On 10 November 2015 at 04:40, Fabio Estevam <fabio.estevam@freescale.com> wrote: > > This reverts commit 5ba534d247d418e09c5b4fe5fb7fa780aac08e49. > > > > This commit causes cgtqmx6eval to not boot anymore: > > > > U-Boot SPL 2015.10-00527-g8800bee (Nov 09 2015 - 21:23:54) > > mxc_spi: SPI Slave not allocated ! > > > > Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> > > --- > > arch/arm/lib/crt0.S | 28 ++++++++++++++++++++++++---- > > 1 file changed, 24 insertions(+), 4 deletions(-) > > We're at the very start the release process, so I wonder if we can try > to figure out what is wrong here? > > Is it because malloc() is not working, perhaps? > > The C code should be roughly equivalent to the assembly code. "Roughly". :) However: > Albert > found a problem with the code on toolchain 5.2.1 to do with setting > 'gd', so may have some thoughts on this. But this might be a different > problem. I've looked into cgtqmx6eval, and if I'm not mistaken it builds ARM, not Thumb, code, whereas the bug I found is on Thumb code (thumb-1 at least). So yes, this seems like a different problem than the gcc-5.2.1-induced one. > Regards, > Simon Amicalement,
diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S index 80548eb..4c3a94a 100644 --- a/arch/arm/lib/crt0.S +++ b/arch/arm/lib/crt0.S @@ -82,11 +82,31 @@ ENTRY(_main) #else bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ #endif - mov r0, sp - bl board_init_f_mem - mov sp, r0 - + mov r2, sp + sub sp, sp, #GD_SIZE /* allocate one GD above SP */ +#if defined(CONFIG_CPU_V7M) /* v7M forbids using SP as BIC destination */ + mov r3, sp + bic r3, r3, #7 + mov sp, r3 +#else + bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ +#endif + mov r9, sp /* GD is above SP */ + mov r1, sp mov r0, #0 +clr_gd: + cmp r1, r2 /* while not at end of GD */ +#if defined(CONFIG_CPU_V7M) + itt lo +#endif + strlo r0, [r1] /* clear 32-bit GD word */ + addlo r1, r1, #4 /* move to next */ + blo clr_gd +#if defined(CONFIG_SYS_MALLOC_F_LEN) + sub sp, sp, #CONFIG_SYS_MALLOC_F_LEN + str sp, [r9, #GD_MALLOC_BASE] +#endif + /* mov r0, #0 not needed due to above code */ bl board_init_f #if ! defined(CONFIG_SPL_BUILD)
This reverts commit 5ba534d247d418e09c5b4fe5fb7fa780aac08e49. This commit causes cgtqmx6eval to not boot anymore: U-Boot SPL 2015.10-00527-g8800bee (Nov 09 2015 - 21:23:54) mxc_spi: SPI Slave not allocated ! Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> --- arch/arm/lib/crt0.S | 28 ++++++++++++++++++++++++---- 1 file changed, 24 insertions(+), 4 deletions(-)