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[U-Boot,v4,19/23] ARM: tegra: Enable non-cached memory

Message ID 1418189127-27407-20-git-send-email-sjg@chromium.org
State Accepted
Delegated to: Simon Glass
Headers show

Commit Message

Simon Glass Dec. 10, 2014, 5:25 a.m. UTC 
From: Thierry Reding <treding@nvidia.com>

Some boards, most notably those with a PCIe ethernet NIC, require this
to avoid cache coherency problems. Since the option adds very little
code and overhead enable it across all Tegra generations. Other drivers
may also start supporting this functionality at some point, so enabling
it now will automatically reap the benefits later on.

Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
---

Changes in v4: None
Changes in v3: None

 include/configs/tegra-common.h | 2 ++
 1 file changed, 2 insertions(+)
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Patch

diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h
index 0eb2d6b..3ce566c 100644
--- a/include/configs/tegra-common.h
+++ b/include/configs/tegra-common.h
@@ -50,6 +50,8 @@ 
 #ifdef CONFIG_SPL_BUILD
 #define CONFIG_SYS_MALLOC_SIMPLE
 #endif
+#define CONFIG_SYS_NONCACHED_MEMORY	(1 << 20)	/* 1 MiB */
+
 /*
  * NS16550 Configuration
  */