diff mbox

[U-Boot,v2,5/5] arm: ls102xa: Select ge2_clk125 for eTSEC clock muxing

Message ID 1413530796-12881-5-git-send-email-b18965@freescale.com
State Accepted
Delegated to: York Sun
Headers show

Commit Message

Alison Wang Oct. 17, 2014, 7:26 a.m. UTC 
EC1 pins in RCW can be selected as RGMII1, GPIO3, CAN1/2, FTM1 or
SAI1/2. There is a bug that EC3 RGMII could not work when selecting EC1
as other functionality except RGMII. The workaround is to select
ge2_clk125 for eTSEC clock muxing in register SCFG_ETSECCMCR.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
---
Change log:
 v2: New patch.

 board/freescale/ls1021aqds/ls1021aqds.c | 1 +
 1 file changed, 1 insertion(+)

Comments

York Sun Nov. 25, 2014, 5:56 p.m. UTC | #1 
On 10/17/2014 12:26 AM, Alison Wang wrote:
> EC1 pins in RCW can be selected as RGMII1, GPIO3, CAN1/2, FTM1 or
> SAI1/2. There is a bug that EC3 RGMII could not work when selecting EC1
> as other functionality except RGMII. The workaround is to select
> ge2_clk125 for eTSEC clock muxing in register SCFG_ETSECCMCR.
> 
> Signed-off-by: Alison Wang <alison.wang@freescale.com>
> ---
> Change log:
>  v2: New patch.
> 
>  board/freescale/ls1021aqds/ls1021aqds.c | 1 +
>  1 file changed, 1 insertion(+)

Applied to u-boot-fsl-qoriq master. Awaiting upstream. Thanks.

York
diff mbox

Patch

diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c
index 56028f8..b744250 100644
--- a/board/freescale/ls1021aqds/ls1021aqds.c
+++ b/board/freescale/ls1021aqds/ls1021aqds.c
@@ -137,6 +137,7 @@  int board_early_init_f(void)
 
 #ifdef CONFIG_TSEC_ENET
 	out_be32(&scfg->etsecdmamcr, SCFG_ETSECDMAMCR_LE_BD_FR);
+	out_be32(&scfg->etsecmcr, SCFG_ETSECCMCR_GE2_CLK125);
 #endif
 
 #ifdef CONFIG_FSL_IFC