| Message ID | 1411959194-48189-1-git-send-email-b18965@freescale.com |
|---|---|
| State | Superseded |
| Delegated to: | York Sun |
| Headers | show |
Hi Alison, On Mon, 29 Sep 2014 10:53:11 +0800, Alison Wang <b18965@freescale.com> wrote: > From: Jason Jin <Jason.Jin@freescale.com> > > Disable the snoop for slave interface 0, 1 and 2 > to avoid the interleaving on the CCI400 BUS. Please be more specific: this patch specifically targets arch ls102xa and some associated boards, but the subject/commit summary (and commit message) does not mention that, making it look like a very generic patch. Amicalement,
Hi, Albert, > On Mon, 29 Sep 2014 10:53:11 +0800, Alison Wang <b18965@freescale.com> > wrote: > > > From: Jason Jin <Jason.Jin@freescale.com> > > > > Disable the snoop for slave interface 0, 1 and 2 to avoid the > > interleaving on the CCI400 BUS. > > Please be more specific: this patch specifically targets arch ls102xa > and some associated boards, but the subject/commit summary (and commit > message) does not mention that, making it look like a very generic > patch. > [Alison Wang] Yes, I will change it in v2. Thanks. Best Regards, Alison Wang
diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h index 7995fe2..a1f4fdb 100644 --- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h +++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h @@ -448,6 +448,7 @@ struct ccsr_ddr { #define CCI400_CTRLORD_TERM_BARRIER 0x00000008 #define CCI400_CTRLORD_EN_BARRIER 0 +#define CCI400_SHAORD_NON_SHAREABLE 0x00000002 /* CCI-400 registers */ struct ccsr_cci400 { diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c index 12e83f7..e32dbeb 100644 --- a/board/freescale/ls1021aqds/ls1021aqds.c +++ b/board/freescale/ls1021aqds/ls1021aqds.c @@ -220,6 +220,13 @@ int board_init(void) /* Set CCI-400 control override register to * enable barrier transaction */ out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER); + /* + * Set CCI-400 Slave interface S0, S1, S2 Shareable Override Register + * All transactions are treated as non-shareable + */ + out_le32(&cci->slave[0].sha_ord, CCI400_SHAORD_NON_SHAREABLE); + out_le32(&cci->slave[1].sha_ord, CCI400_SHAORD_NON_SHAREABLE); + out_le32(&cci->slave[2].sha_ord, CCI400_SHAORD_NON_SHAREABLE); select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT); diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c index b522ff2..811c911 100644 --- a/board/freescale/ls1021atwr/ls1021atwr.c +++ b/board/freescale/ls1021atwr/ls1021atwr.c @@ -272,6 +272,16 @@ int board_early_init_f(void) int board_init(void) { + struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR; + + /* + * Set CCI-400 Slave interface S0, S1, S2 Shareable Override Register + * All transactions are treated as non-shareable + */ + out_le32(&cci->slave[0].sha_ord, CCI400_SHAORD_NON_SHAREABLE); + out_le32(&cci->slave[1].sha_ord, CCI400_SHAORD_NON_SHAREABLE); + out_le32(&cci->slave[2].sha_ord, CCI400_SHAORD_NON_SHAREABLE); + #ifndef CONFIG_SYS_FSL_NO_SERDES fsl_serdes_init(); config_serdes_mux();