| Message ID | 1404749802-22450-2-git-send-email-sjg@chromium.org |
|---|---|
| State | Accepted |
| Delegated to: | Jagannadha Sutradharudu Teki |
| Headers | show |
On Mon, Jul 7, 2014 at 9:46 PM, Simon Glass <sjg@chromium.org> wrote: > The SPI transaction delay is supposed to be measured from the end of one > transaction to the start of the next. The code does not work that way, so > fix it. > > Signed-off-by: Simon Glass <sjg@chromium.org> > --- > > drivers/spi/exynos_spi.c | 9 +++++---- > 1 file changed, 5 insertions(+), 4 deletions(-) > > diff --git a/drivers/spi/exynos_spi.c b/drivers/spi/exynos_spi.c > index c92276f..2969184 100644 > --- a/drivers/spi/exynos_spi.c > +++ b/drivers/spi/exynos_spi.c > @@ -428,10 +428,6 @@ void spi_cs_activate(struct spi_slave *slave) > clrbits_le32(&spi_slave->regs->cs_reg, SPI_SLAVE_SIG_INACT); > debug("Activate CS, bus %d\n", spi_slave->slave.bus); > spi_slave->skip_preamble = spi_slave->mode & SPI_PREAMBLE; > - > - /* Remember time of this transaction so we can honour the bus delay */ > - if (spi_slave->bus->deactivate_delay_us) > - spi_slave->last_transaction_us = timer_get_us(); > } > > /** > @@ -445,6 +441,11 @@ void spi_cs_deactivate(struct spi_slave *slave) > struct exynos_spi_slave *spi_slave = to_exynos_spi(slave); > > setbits_le32(&spi_slave->regs->cs_reg, SPI_SLAVE_SIG_INACT); > + > + /* Remember time of this transaction so we can honour the bus delay */ > + if (spi_slave->bus->deactivate_delay_us) > + spi_slave->last_transaction_us = timer_get_us(); > + > debug("Deactivate CS, bus %d\n", spi_slave->slave.bus); > } > > -- > 2.0.0.526.g5318336 > > _______________________________________________ > U-Boot mailing list > U-Boot@lists.denx.de > http://lists.denx.de/mailman/listinfo/u-boot Able to test display on peach_pit(which needs tps65090) with these patches. Also, crosec commands from u-boot prompt works as expected on peach_pit. Tested-by: Ajay Kumar <ajaykumar.rs@samsung.com>
On Tue, Jul 8, 2014 at 11:41 AM, Ajay kumar <ajaynumb@gmail.com> wrote: > On Mon, Jul 7, 2014 at 9:46 PM, Simon Glass <sjg@chromium.org> wrote: >> The SPI transaction delay is supposed to be measured from the end of one >> transaction to the start of the next. The code does not work that way, so >> fix it. >> >> Signed-off-by: Simon Glass <sjg@chromium.org> >> --- >> >> drivers/spi/exynos_spi.c | 9 +++++---- >> 1 file changed, 5 insertions(+), 4 deletions(-) >> >> diff --git a/drivers/spi/exynos_spi.c b/drivers/spi/exynos_spi.c >> index c92276f..2969184 100644 >> --- a/drivers/spi/exynos_spi.c >> +++ b/drivers/spi/exynos_spi.c >> @@ -428,10 +428,6 @@ void spi_cs_activate(struct spi_slave *slave) >> clrbits_le32(&spi_slave->regs->cs_reg, SPI_SLAVE_SIG_INACT); >> debug("Activate CS, bus %d\n", spi_slave->slave.bus); >> spi_slave->skip_preamble = spi_slave->mode & SPI_PREAMBLE; >> - >> - /* Remember time of this transaction so we can honour the bus delay */ >> - if (spi_slave->bus->deactivate_delay_us) >> - spi_slave->last_transaction_us = timer_get_us(); >> } >> >> /** >> @@ -445,6 +441,11 @@ void spi_cs_deactivate(struct spi_slave *slave) >> struct exynos_spi_slave *spi_slave = to_exynos_spi(slave); >> >> setbits_le32(&spi_slave->regs->cs_reg, SPI_SLAVE_SIG_INACT); >> + >> + /* Remember time of this transaction so we can honour the bus delay */ >> + if (spi_slave->bus->deactivate_delay_us) >> + spi_slave->last_transaction_us = timer_get_us(); >> + >> debug("Deactivate CS, bus %d\n", spi_slave->slave.bus); >> } >> >> -- >> 2.0.0.526.g5318336 >> >> _______________________________________________ >> U-Boot mailing list >> U-Boot@lists.denx.de >> http://lists.denx.de/mailman/listinfo/u-boot > Able to test display on peach_pit(which needs tps65090) with these patches. > Also, crosec commands from u-boot prompt works as expected on peach_pit. > > Tested-by: Ajay Kumar <ajaykumar.rs@samsung.com> Applied to u-boot-spi/master thanks!
diff --git a/drivers/spi/exynos_spi.c b/drivers/spi/exynos_spi.c index c92276f..2969184 100644 --- a/drivers/spi/exynos_spi.c +++ b/drivers/spi/exynos_spi.c @@ -428,10 +428,6 @@ void spi_cs_activate(struct spi_slave *slave) clrbits_le32(&spi_slave->regs->cs_reg, SPI_SLAVE_SIG_INACT); debug("Activate CS, bus %d\n", spi_slave->slave.bus); spi_slave->skip_preamble = spi_slave->mode & SPI_PREAMBLE; - - /* Remember time of this transaction so we can honour the bus delay */ - if (spi_slave->bus->deactivate_delay_us) - spi_slave->last_transaction_us = timer_get_us(); } /** @@ -445,6 +441,11 @@ void spi_cs_deactivate(struct spi_slave *slave) struct exynos_spi_slave *spi_slave = to_exynos_spi(slave); setbits_le32(&spi_slave->regs->cs_reg, SPI_SLAVE_SIG_INACT); + + /* Remember time of this transaction so we can honour the bus delay */ + if (spi_slave->bus->deactivate_delay_us) + spi_slave->last_transaction_us = timer_get_us(); + debug("Deactivate CS, bus %d\n", spi_slave->slave.bus); }
The SPI transaction delay is supposed to be measured from the end of one transaction to the start of the next. The code does not work that way, so fix it. Signed-off-by: Simon Glass <sjg@chromium.org> --- drivers/spi/exynos_spi.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-)