| Message ID | 1400111883-2333-1-git-send-email-eric.nelson@boundarydevices.com |
|---|---|
| State | Accepted |
| Delegated to: | Stefano Babic |
| Headers | show |
Hi Eric, On 15/05/2014 01:58, Eric Nelson wrote: > Bit 7 of UCR3 is described in the i.MX3x/i.MX5x/i.MX6x > reference manuals as follows: > > Autobaud Detection Not Improved-. Disables new features of > autobaud detection (See Baud Rate Automatic Detection > Protocol, for more details). > > 0 Autobaud detection new features selected > 1 Keep old autobaud detection mechanism > > On at least i.MX6DQ, i.MX6DLS and i.MX53, the "new features" > occasionally cause the receiver to get out of sync and > continuously produce received characters of '\xff'. > > This patch disables the "new feature" on all boards, since > there's no support for auto-baud in U-Boot on any of them. > > More details are available in this post on i.MX Community: > https://community.freescale.com/message/403254 > > Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> > Tested-by: Fabio Estevam <fabio.estevam@freescale.com> > --- > drivers/serial/serial_mxc.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/serial/serial_mxc.c b/drivers/serial/serial_mxc.c > index 56bee55..313d560 100644 > --- a/drivers/serial/serial_mxc.c > +++ b/drivers/serial/serial_mxc.c > @@ -77,7 +77,7 @@ > #define UCR3_DSR (1<<10) /* Data set ready */ > #define UCR3_DCD (1<<9) /* Data carrier detect */ > #define UCR3_RI (1<<8) /* Ring indicator */ > -#define UCR3_TIMEOUTEN (1<<7) /* Timeout interrupt enable */ > +#define UCR3_ADNIMP (1<<7) /* Autobaud Detection Not Improved */ > #define UCR3_RXDSEN (1<<6) /* Receive status interrupt enable */ > #define UCR3_AIRINTEN (1<<5) /* Async IR wake interrupt enable */ > #define UCR3_AWAKEN (1<<4) /* Async wake interrupt enable */ > @@ -186,7 +186,7 @@ static int mxc_serial_init(void) > > while (!(__REG(UART_PHYS + UCR2) & UCR2_SRST)); > > - __REG(UART_PHYS + UCR3) = 0x0704; > + __REG(UART_PHYS + UCR3) = 0x0704 | UCR3_ADNIMP; > __REG(UART_PHYS + UCR4) = 0x8000; > __REG(UART_PHYS + UESC) = 0x002b; > __REG(UART_PHYS + UTIM) = 0x0; > Thanks to have found a solved this issue ! Acked-by: Stefano Babic <sbabic@denx.de> Best regards, Stefano Babic
On 15/05/2014 01:58, Eric Nelson wrote: > Bit 7 of UCR3 is described in the i.MX3x/i.MX5x/i.MX6x > reference manuals as follows: > > Autobaud Detection Not Improved-. Disables new features of > autobaud detection (See Baud Rate Automatic Detection > Protocol, for more details). > > 0 Autobaud detection new features selected > 1 Keep old autobaud detection mechanism > > On at least i.MX6DQ, i.MX6DLS and i.MX53, the "new features" > occasionally cause the receiver to get out of sync and > continuously produce received characters of '\xff'. > > This patch disables the "new feature" on all boards, since > there's no support for auto-baud in U-Boot on any of them. > > More details are available in this post on i.MX Community: > https://community.freescale.com/message/403254 > > Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> > Tested-by: Fabio Estevam <fabio.estevam@freescale.com> > --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic
diff --git a/drivers/serial/serial_mxc.c b/drivers/serial/serial_mxc.c index 56bee55..313d560 100644 --- a/drivers/serial/serial_mxc.c +++ b/drivers/serial/serial_mxc.c @@ -77,7 +77,7 @@ #define UCR3_DSR (1<<10) /* Data set ready */ #define UCR3_DCD (1<<9) /* Data carrier detect */ #define UCR3_RI (1<<8) /* Ring indicator */ -#define UCR3_TIMEOUTEN (1<<7) /* Timeout interrupt enable */ +#define UCR3_ADNIMP (1<<7) /* Autobaud Detection Not Improved */ #define UCR3_RXDSEN (1<<6) /* Receive status interrupt enable */ #define UCR3_AIRINTEN (1<<5) /* Async IR wake interrupt enable */ #define UCR3_AWAKEN (1<<4) /* Async wake interrupt enable */ @@ -186,7 +186,7 @@ static int mxc_serial_init(void) while (!(__REG(UART_PHYS + UCR2) & UCR2_SRST)); - __REG(UART_PHYS + UCR3) = 0x0704; + __REG(UART_PHYS + UCR3) = 0x0704 | UCR3_ADNIMP; __REG(UART_PHYS + UCR4) = 0x8000; __REG(UART_PHYS + UESC) = 0x002b; __REG(UART_PHYS + UTIM) = 0x0;
Bit 7 of UCR3 is described in the i.MX3x/i.MX5x/i.MX6x reference manuals as follows: Autobaud Detection Not Improved-. Disables new features of autobaud detection (See Baud Rate Automatic Detection Protocol, for more details). 0 Autobaud detection new features selected 1 Keep old autobaud detection mechanism On at least i.MX6DQ, i.MX6DLS and i.MX53, the "new features" occasionally cause the receiver to get out of sync and continuously produce received characters of '\xff'. This patch disables the "new feature" on all boards, since there's no support for auto-baud in U-Boot on any of them. More details are available in this post on i.MX Community: https://community.freescale.com/message/403254 Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Tested-by: Fabio Estevam <fabio.estevam@freescale.com> --- drivers/serial/serial_mxc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)