| Message ID | 1391011745-22239-2-git-send-email-abrodkin@synopsys.com |
|---|---|
| State | Superseded |
| Delegated to: | Tom Rini |
| Headers | show |
Dear Alexey Brodkin, In message <1391011745-22239-2-git-send-email-abrodkin@synopsys.com> you wrote: > These are header files used by ARC700 architecture. ... > +/* Build Configuration Registers */ > +#define ARC_REG_DCCMBASE_BCR 0x61 /* DCCM Base Addr */ > +#define ARC_REG_CRC_BCR 0x62 > +#define ARC_REG_DVFB_BCR 0x64 > +#define ARC_REG_EXTARITH_BCR 0x65 > +#define ARC_REG_VECBASE_BCR 0x68 > +#define ARC_REG_PERIBASE_BCR 0x69 > +#define ARC_REG_FP_BCR 0x6B /* Single-Precision FPU */ > +#define ARC_REG_DPFP_BCR 0x6C /* Dbl Precision FPU */ > +#define ARC_REG_DCCM_BCR 0x74 /* DCCM Present + SZ */ > +#define ARC_REG_TIMERS_BCR 0x75 > +#define ARC_REG_ICCM_BCR 0x78 > +#define ARC_REG_XY_MEM_BCR 0x79 > +#define ARC_REG_MAC_BCR 0x7a > +#define ARC_REG_MUL_BCR 0x7b > +#define ARC_REG_SWAP_BCR 0x7c > +#define ARC_REG_NORM_BCR 0x7d > +#define ARC_REG_MIXMAX_BCR 0x7e > +#define ARC_REG_BARREL_BCR 0x7f > +#define ARC_REG_D_UNCACH_BCR 0x6A Are you sure that this should not become a C struct declaration? This looks much like offsets, and we so not allow a base address + offset notation for device I/O ... > +/* status32 Bits Positions */ > +#define STATUS_AE_BIT 5 /* Exception active */ > +#define STATUS_DE_BIT 6 /* PC is in delay slot */ > +#define STATUS_U_BIT 7 /* User/Kernel mode */ > +#define STATUS_L_BIT 12 /* Loop inhibit */ Please uses masks instead of bit numbers. Bitfields are inherently non-portable and dangerous. > +/* These masks correspond to the status word(STATUS_32) bits */ > +#define STATUS_AE_MASK (1<<STATUS_AE_BIT) > +#define STATUS_DE_MASK (1<<STATUS_DE_BIT) > +#define STATUS_U_MASK (1<<STATUS_U_BIT) > +#define STATUS_L_MASK (1<<STATUS_L_BIT) As the STATUS_??_BIT defiens should not be used anywhere else, you might drop them without loss of readability. > +/* > + ****************************************************************** > + * Inline ASM macros to read/write AUX Regs > + * Essentially invocation of lr/sr insns from "C" > + */ Can we drop this "*******************" line? > +#if 1 > + > +#define read_aux_reg(reg) __builtin_arc_lr(reg) > + > +/* gcc builtin sr needs reg param to be long immediate */ > +#define write_aux_reg(reg_immed, val) \ > + __builtin_arc_sr((unsigned int)val, reg_immed) > + > +#else > + > +#define read_aux_reg(reg) \ ... > +#endif This pretty long else branch is just dead code. Please get rid of all such "#if 1" or "#if 0" blocks in your code, globally. > +#define READ_BCR(reg, into) \ > +{ \ > + unsigned int tmp; \ > + tmp = read_aux_reg(reg); \ > + if (sizeof(tmp) == sizeof(into)) { \ > + into = *((typeof(into) *)&tmp); \ > + } else { \ > + extern void bogus_undefined(void); \ > + bogus_undefined(); \ > + } \ > +} > + > +#define WRITE_BCR(reg, into) \ > +{ \ > + unsigned int tmp; \ > + if (sizeof(tmp) == sizeof(into)) { \ > + tmp = (*(unsigned int *)(into)); \ > + write_aux_reg(reg, tmp); \ > + } else { \ > + extern void bogus_undefined(void); \ > + bogus_undefined(); \ > + } \ > +} Do we really need this? No other architecture does anything like that. Can you not just use standard I/O accessors? > +/* Helpers */ > +#define TO_KB(bytes) ((bytes) >> 10) > +#define TO_MB(bytes) (TO_KB(bytes) >> 10) > +#define PAGES_TO_KB(n_pages) ((n_pages) << (PAGE_SHIFT - 10)) > +#define PAGES_TO_MB(n_pages) (PAGES_TO_KB(n_pages) >> 10) Please drop these. The just make the code harder to read. > +struct bcr_identity { > +#ifdef CONFIG_CPU_BIG_ENDIAN > + unsigned int chip_id:16, cpu_id:8, family:8; > +#else > + unsigned int family:8, cpu_id:8, chip_id:16; > +#endif > +}; Arghh... Please by all means try to avoid bitfields! They are pure evil and are strongly discouraged! > +struct bcr_extn { > +#ifdef CONFIG_CPU_BIG_ENDIAN > + unsigned int pad:20, crc:1, ext_arith:2, mul:2, barrel:2, minmax:2, > + norm:2, swap:1; > +#else > + unsigned int swap:1, norm:2, minmax:2, barrel:2, mul:2, ext_arith:2, > + crc:1, pad:20; > +#endif > +}; Do you really need your own definition CONFIG_CPU_BIG_ENDIAN here? Can you not use the existing standard defines instead? If you do, please keep inmind that all new CONFIG_ optins must be explained in the README. > +/* DSP Options Ref Manual */ > +struct bcr_extn_mac_mul { > +#ifdef CONFIG_CPU_BIG_ENDIAN > + unsigned int pad:16, type:8, ver:8; > +#else > + unsigned int ver:8, type:8, pad:16; > +#endif > +}; > + > +struct bcr_extn_xymem { > +#ifdef CONFIG_CPU_BIG_ENDIAN > + unsigned int ram_org:2, num_banks:4, bank_sz:4, ver:8; > +#else > + unsigned int ver:8, bank_sz:4, num_banks:4, ram_org:2; > +#endif > +}; .. etc. With all these tons of bitfields the code will be a mess to read and understand. Please really try and get rid of using bitfields! > +/* > + ******************************************************************* > + * Generic structures to hold build configuration used at runtime > + */ Incorrect multiline comment style. Please fix globally. > +struct cpuinfo_arc_mmu { > + unsigned int ver, pg_sz, sets, ways, u_dtlb, u_itlb, num_tlb; > +}; Please declare structs one field per line, and comment the meaning of the fields. Please fix globally. > +#if !defined(__STRICT_ANSI__) || defined(__KERNEL__) > + #define __BYTEORDER_HAS_U64__ > + #define __SWAB_64_THRU_32__ > +#endif We don't have __KERNEL__ much longer, I think... > +#define IO_WRITE32(val, addr) ({__asm__ __volatile__ ("st.di %0,[%1]" : : \ > + "r" ((val)) , "r" ((addr))); }) > + > +#define IO_READ32(addr) ({unsigned int val = 0; __asm__ __volatile__ \ > + ("ld.di %0,[%1]" : "=&r" ((val)) : "r" ((addr))); val; }) > + > +#define IO_WRITE8(val, addr) ({__asm__ __volatile__ ("stb.di %0,[%1]" : : \ > + "r" ((val)), "r" ((addr))); }) > + > +#define IO_READ8(addr) ({unsigned int val = 0; __asm__ __volatile__ \ > + ("ldb.di %0,[%1]" : "=&r" ((val)) : "r" ((addr))); val; }) Why would these IOREAD*/IO_WRITE* macros be needed in addition to the read*/write* accessors? Their definitions look pretty much identical to me. > +#define writeb(val, addr) ({ __asm__ __volatile__ ("stb.di %0,[%1]" : :\ > + "r" ((val)), "r" ((addr))); }) > + > +#define writew(val, addr) ({ __asm__ __volatile__ ("stw.di %0,[%1]" : :\ > + "r" ((val)), "r" ((addr))); }) > + > +#define writel(val, addr) ({ __asm__ __volatile__ ("st.di %0,[%1]" : :\ > + "r" ((val)), "r" ((addr))); }) > + > +#define readb(addr) ({unsigned int val = 0; __asm__ __volatile__ \ > + ("ldb.di %0,[%1]" : "=&r" ((val)) : "r" ((addr))); val; }) > + > +#define readw(addr) ({unsigned int val = 0; __asm__ __volatile__ \ > + ("ldw.di %0,[%1]" : "=&r" ((val)) : "r" ((addr))); val; }) > + > +#define readl(addr) ({unsigned int val = 0; __asm__ __volatile__ \ > + ("ld.di %0,[%1]" : "=&r" ((val)) : "r"((addr))); val; }) As far as I can tell there is no type checking for the arguments passed here. Can this please be added, so the compiler can catch when you for example try to use a writel() on a address that points to char only? > +/* > + * Generic virtual read/write > + */ > +#define iomem_valid_addr(iomem, sz) (1) > +#define iomem_to_phys(iomem) (iomem) > + > +#ifdef __io > +#define outb(v, p) __raw_writeb(v, __io(p)) > +#define outw(v, p) __raw_writew(cpu_to_le16(v), __io(p)) > +#define outl(v, p) __raw_writel(cpu_to_le32(v), __io(p)) > + > +#define inb(p) ({ unsigned int __v = __raw_readb(__io(p)); __v; }) > +#define inw(p) ({ unsigned int __v = le16_to_cpu(__raw_readw(__io(p))); __v; }) > +#define inl(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(__io(p))); __v; }) > + > +#define outsb(p, d, l) __raw_writesb(__io(p), d, l) > +#define outsw(p, d, l) __raw_writesw(__io(p), d, l) > +#define outsl(p, d, l) __raw_writesl(__io(p), d, l) > + > +#define insb(p, d, l) __raw_readsb(__io(p), d, l) > +#define insw(p, d, l) __raw_readsw(__io(p), d, l) > +#define insl(p, d, l) __raw_readsl(__io(p), d, l) > +#endif > + > +#define outb_p(val, port) outb((val), (port)) > +#define outw_p(val, port) outw((val), (port)) > +#define outl_p(val, port) outl((val), (port)) > + > +#define inb_p(port) inb((port)) > +#define inw_p(port) inw((port)) > +#define inl_p(port) inl((port)) > + > +#define outsb_p(port, from, len) outsb(port, from, len) > +#define outsw_p(port, from, len) outsw(port, from, len) > +#define outsl_p(port, from, len) outsl(port, from, len) > + > +#define insb_p(port, to, len) insb(port, to, len) > +#define insw_p(port, to, len) insw(port, to, len) > +#define insl_p(port, to, len) insl(port, to, len) Do we actually need any of this in U-Boot? Please clean up and remove unused stuff... > +/* > + * Given a physical address and a length, return a virtual address > + * that can be used to access the memory range with the caching > + * properties specified by "flags". > + */ > +#define MAP_NOCACHE (0) > +#define MAP_WRCOMBINE (0) > +#define MAP_WRBACK (0) > +#define MAP_WRTHROUGH (0) Needed in U-Boot? Please fix globally. > +/* Written to pacify arch indepeandant code. > + * Not used by ARC I/O > + */ > +#define _inb inb > +#define _outb outb > + > +#define IO_SPACE_LIMIT 0xffff > + > +#define IOMAP_FULL_CACHING 0 > +#define IOMAP_NOCACHE_SER 1 > +#define IOMAP_NOCACHE_NONSER 2 > +#define IOMAP_WRITETHROUGH 3 I think you can drop that, too? > +/* Can't use the ENTRY macro in linux/linkage.h > + * gas considers ';' as comment vs. newline > + */ > +.macro ARC_ENTRY name > + .global \name > + .align 4 > + \name: > +.endm Is this really correct sytax for this architecture? I would expect that the "\n" means a newline character ;-) > +/* > + * This file is generally used by user-level software, so you need to > + * be a little careful about namespace pollution etc. Also, we cannot > + * assume GCC is being used. > + */ > + > +typedef unsigned short __kernel_dev_t; > +typedef unsigned long __kernel_ino_t; > +typedef unsigned short __kernel_mode_t; > +typedef unsigned short __kernel_nlink_t; > +typedef long __kernel_off_t; > +typedef int __kernel_pid_t; > +typedef unsigned short __kernel_ipc_pid_t; > +typedef unsigned short __kernel_uid_t; > +typedef unsigned short __kernel_gid_t; > +typedef unsigned int __kernel_size_t; > +typedef int __kernel_ssize_t; > +typedef int __kernel_ptrdiff_t; > +typedef long __kernel_time_t; > +typedef long __kernel_suseconds_t; > +typedef long __kernel_clock_t; > +typedef int __kernel_daddr_t; > +typedef char * __kernel_caddr_t; > +typedef unsigned short __kernel_uid16_t; > +typedef unsigned short __kernel_gid16_t; > +typedef unsigned int __kernel_uid32_t; > +typedef unsigned int __kernel_gid32_t; > + > +typedef unsigned short __kernel_old_uid_t; > +typedef unsigned short __kernel_old_gid_t; > + > +#ifdef __GNUC__ > +typedef long long __kernel_loff_t; > +#endif > + > +typedef struct { > +#if defined(__KERNEL__) || defined(__USE_ALL) > + int val[2]; > +#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */ > + int __val[2]; > +#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */ > +} __kernel_fsid_t; > + > +#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) > + > +#undef __FD_SET > +#define __FD_SET(fd, fdsetp) \ > + (((fd_set *)fdsetp)->fds_bits[fd >> 5] |= (1<<(fd & 31))) > + > +#undef __FD_CLR > +#define __FD_CLR(fd, fdsetp) \ > + (((fd_set *)fdsetp)->fds_bits[fd >> 5] &= ~(1<<(fd & 31))) > + > +#undef __FD_ISSET > +#define __FD_ISSET(fd, fdsetp) \ > + ((((fd_set *)fdsetp)->fds_bits[fd >> 5] & (1<<(fd & 31))) != 0) > + Is any of this actually relevant in U-Boot? > +#undef __FD_ZERO > +#define __FD_ZERO(fdsetp) \ > + (memset (fdsetp, 0, sizeof (*(fd_set *)fdsetp))) > + > +#endif Note that checkpatch throws warnings here: WARNING: space prohibited between function name and open parenthesis '(' Please make sure to run all your patches through checkpatch and fix such errors and warnings! > +#endif /* __ASM_ARC_POSIX_TYPES_H */ > diff --git a/arch/arc/include/asm/ptrace.h b/arch/arc/include/asm/ptrace.h > new file mode 100644 > index 0000000..3b2df87 > --- /dev/null > +++ b/arch/arc/include/asm/ptrace.h > @@ -0,0 +1,101 @@ > +/* > + * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. All rights reserved. > + * > + * SPDX-License-Identifier: GPL-2.0+ > + */ > + > +#ifndef __ASM_ARC_PTRACE_H > +#define __ASM_ARC_PTRACE_H > + > +#ifndef __ASSEMBLY__ > + > +/* THE pt_regs: Defines how regs are saved during entry into kernel */ Needed? > +/* return 1 if user mode or 0 if kernel mode */ > +#define user_mode(regs) (regs->status32 & STATUS_U_MASK) Certainly not needed, right? etc. etc. Best regards, Wolfgang Denk
Hello Wolfgang, On Wed, 2014-01-29 at 20:54 +0100, Wolfgang Denk wrote: > Dear Alexey Brodkin, > > In message <1391011745-22239-2-git-send-email-abrodkin@synopsys.com> you wrote: > > These are header files used by ARC700 architecture. > ... > > +/* Build Configuration Registers */ > > +#define ARC_REG_DCCMBASE_BCR 0x61 /* DCCM Base Addr */ > > +#define ARC_REG_CRC_BCR 0x62 > > +#define ARC_REG_DVFB_BCR 0x64 > > +#define ARC_REG_EXTARITH_BCR 0x65 > > +#define ARC_REG_VECBASE_BCR 0x68 > > +#define ARC_REG_PERIBASE_BCR 0x69 > > +#define ARC_REG_FP_BCR 0x6B /* Single-Precision FPU */ > > +#define ARC_REG_DPFP_BCR 0x6C /* Dbl Precision FPU */ > > +#define ARC_REG_DCCM_BCR 0x74 /* DCCM Present + SZ */ > > +#define ARC_REG_TIMERS_BCR 0x75 > > +#define ARC_REG_ICCM_BCR 0x78 > > +#define ARC_REG_XY_MEM_BCR 0x79 > > +#define ARC_REG_MAC_BCR 0x7a > > +#define ARC_REG_MUL_BCR 0x7b > > +#define ARC_REG_SWAP_BCR 0x7c > > +#define ARC_REG_NORM_BCR 0x7d > > +#define ARC_REG_MIXMAX_BCR 0x7e > > +#define ARC_REG_BARREL_BCR 0x7f > > +#define ARC_REG_D_UNCACH_BCR 0x6A > > Are you sure that this should not become a C struct declaration? This > looks much like offsets, and we so not allow a base address + offset > notation for device I/O ... > > > +/* status32 Bits Positions */ > > +#define STATUS_AE_BIT 5 /* Exception active */ > > +#define STATUS_DE_BIT 6 /* PC is in delay slot */ > > +#define STATUS_U_BIT 7 /* User/Kernel mode */ > > +#define STATUS_L_BIT 12 /* Loop inhibit */ > > Please uses masks instead of bit numbers. Bitfields are inherently > non-portable and dangerous. > > > +/* These masks correspond to the status word(STATUS_32) bits */ > > +#define STATUS_AE_MASK (1<<STATUS_AE_BIT) > > +#define STATUS_DE_MASK (1<<STATUS_DE_BIT) > > +#define STATUS_U_MASK (1<<STATUS_U_BIT) > > +#define STATUS_L_MASK (1<<STATUS_L_BIT) > > As the STATUS_??_BIT defiens should not be used anywhere else, you > might drop them without loss of readability. > > > +/* > > + ****************************************************************** > > + * Inline ASM macros to read/write AUX Regs > > + * Essentially invocation of lr/sr insns from "C" > > + */ > > Can we drop this "*******************" line? > > > +#if 1 > > + > > +#define read_aux_reg(reg) __builtin_arc_lr(reg) > > + > > +/* gcc builtin sr needs reg param to be long immediate */ > > +#define write_aux_reg(reg_immed, val) \ > > + __builtin_arc_sr((unsigned int)val, reg_immed) > > + > > +#else > > + > > +#define read_aux_reg(reg) \ > ... > > +#endif > > This pretty long else branch is just dead code. Please get rid of all > such "#if 1" or "#if 0" blocks in your code, globally. > > > +#define READ_BCR(reg, into) \ > > +{ \ > > + unsigned int tmp; \ > > + tmp = read_aux_reg(reg); \ > > + if (sizeof(tmp) == sizeof(into)) { \ > > + into = *((typeof(into) *)&tmp); \ > > + } else { \ > > + extern void bogus_undefined(void); \ > > + bogus_undefined(); \ > > + } \ > > +} > > + > > +#define WRITE_BCR(reg, into) \ > > +{ \ > > + unsigned int tmp; \ > > + if (sizeof(tmp) == sizeof(into)) { \ > > + tmp = (*(unsigned int *)(into)); \ > > + write_aux_reg(reg, tmp); \ > > + } else { \ > > + extern void bogus_undefined(void); \ > > + bogus_undefined(); \ > > + } \ > > +} > > Do we really need this? No other architecture does anything like > that. Can you not just use standard I/O accessors? > > > +/* Helpers */ > > +#define TO_KB(bytes) ((bytes) >> 10) > > +#define TO_MB(bytes) (TO_KB(bytes) >> 10) > > +#define PAGES_TO_KB(n_pages) ((n_pages) << (PAGE_SHIFT - 10)) > > +#define PAGES_TO_MB(n_pages) (PAGES_TO_KB(n_pages) >> 10) > > Please drop these. The just make the code harder to read. > > > +struct bcr_identity { > > +#ifdef CONFIG_CPU_BIG_ENDIAN > > + unsigned int chip_id:16, cpu_id:8, family:8; > > +#else > > + unsigned int family:8, cpu_id:8, chip_id:16; > > +#endif > > +}; As it is clearly mentioned in commit message "arcregs.h" came from Linux sources and that's why kept as it was. You may refer to it here - https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/arch/arc/include/asm/arcregs.h?id=v3.11 So I'm wondering if you insist on fixing all mentioned items in "arcregs.h" or I may keep it as it is still? > Arghh... Please by all means try to avoid bitfields! They are pure > evil and are strongly discouraged! > > > +struct bcr_extn { > > +#ifdef CONFIG_CPU_BIG_ENDIAN > > + unsigned int pad:20, crc:1, ext_arith:2, mul:2, barrel:2, minmax:2, > > + norm:2, swap:1; > > +#else > > + unsigned int swap:1, norm:2, minmax:2, barrel:2, mul:2, ext_arith:2, > > + crc:1, pad:20; > > +#endif > > +}; > > Do you really need your own definition CONFIG_CPU_BIG_ENDIAN here? > Can you not use the existing standard defines instead? If you do, > please keep inmind that all new CONFIG_ optins must be explained in > the README. Makes perfect sense. I missed the fact that similar defines have a bit different names in Linux/U-boot. It's CONFIG_CPU_BIG_ENDIAN in Linux while CONFIG_SYS_BIG_ENDIAN in U-Boot. So I'll substitute it here with proper CONFIG_SYS_BIG_ENDIAN. > > +#if !defined(__STRICT_ANSI__) || defined(__KERNEL__) > > + #define __BYTEORDER_HAS_U64__ > > + #define __SWAB_64_THRU_32__ > > +#endif > > We don't have __KERNEL__ much longer, I think... Ok, I copy-pasted it from "arch/arm/include/asm/byteorder.h". And it still has __KERNEL__ - http://git.denx.de/?p=u-boot.git;a=blob;f=arch/arm/include/asm/byteorder.h;h=20cce7657e1059a170fd5ef32688cb96064fcd7f;hb=HEAD Are we going to fix it for existing arches (note all arches except M68K, PowerPC and SPARC have it in "byteorder.h")? So do I need to eliminate all checks for __KERNEL__ then? > > +#define IO_WRITE32(val, addr) ({__asm__ __volatile__ ("st.di %0,[%1]" : : \ > > + "r" ((val)) , "r" ((addr))); }) > > + > > +#define IO_READ32(addr) ({unsigned int val = 0; __asm__ __volatile__ \ > > + ("ld.di %0,[%1]" : "=&r" ((val)) : "r" ((addr))); val; }) > > + > > +#define IO_WRITE8(val, addr) ({__asm__ __volatile__ ("stb.di %0,[%1]" : : \ > > + "r" ((val)), "r" ((addr))); }) > > + > > +#define IO_READ8(addr) ({unsigned int val = 0; __asm__ __volatile__ \ > > + ("ldb.di %0,[%1]" : "=&r" ((val)) : "r" ((addr))); val; }) > > Why would these IOREAD*/IO_WRITE* macros be needed in addition to the > read*/write* accessors? Their definitions look pretty much identical > to me. Indeed they are obsolete and I'll remove them completely. > > +#define writeb(val, addr) ({ __asm__ __volatile__ ("stb.di %0,[%1]" : :\ > > + "r" ((val)), "r" ((addr))); }) > > + > > +#define writew(val, addr) ({ __asm__ __volatile__ ("stw.di %0,[%1]" : :\ > > + "r" ((val)), "r" ((addr))); }) > > + > > +#define writel(val, addr) ({ __asm__ __volatile__ ("st.di %0,[%1]" : :\ > > + "r" ((val)), "r" ((addr))); }) > > + > > +#define readb(addr) ({unsigned int val = 0; __asm__ __volatile__ \ > > + ("ldb.di %0,[%1]" : "=&r" ((val)) : "r" ((addr))); val; }) > > + > > +#define readw(addr) ({unsigned int val = 0; __asm__ __volatile__ \ > > + ("ldw.di %0,[%1]" : "=&r" ((val)) : "r" ((addr))); val; }) > > + > > +#define readl(addr) ({unsigned int val = 0; __asm__ __volatile__ \ > > + ("ld.di %0,[%1]" : "=&r" ((val)) : "r"((addr))); val; }) > > As far as I can tell there is no type checking for the arguments > passed here. Can this please be added, so the compiler can catch when > you for example try to use a writel() on a address that points to char > only? Good suggestion, but I'm wondering if this kind of checks are already implemented in other arches - may I have a reference? > > +/* > > + * Generic virtual read/write > > + */ > > +#define iomem_valid_addr(iomem, sz) (1) > > +#define iomem_to_phys(iomem) (iomem) > > + > > +#ifdef __io > > +#define outb(v, p) __raw_writeb(v, __io(p)) > > +#define outw(v, p) __raw_writew(cpu_to_le16(v), __io(p)) > > +#define outl(v, p) __raw_writel(cpu_to_le32(v), __io(p)) > > + > > +#define inb(p) ({ unsigned int __v = __raw_readb(__io(p)); __v; }) > > +#define inw(p) ({ unsigned int __v = le16_to_cpu(__raw_readw(__io(p))); __v; }) > > +#define inl(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(__io(p))); __v; }) > > + > > +#define outsb(p, d, l) __raw_writesb(__io(p), d, l) > > +#define outsw(p, d, l) __raw_writesw(__io(p), d, l) > > +#define outsl(p, d, l) __raw_writesl(__io(p), d, l) > > + > > +#define insb(p, d, l) __raw_readsb(__io(p), d, l) > > +#define insw(p, d, l) __raw_readsw(__io(p), d, l) > > +#define insl(p, d, l) __raw_readsl(__io(p), d, l) > > +#endif > > + > > +#define outb_p(val, port) outb((val), (port)) > > +#define outw_p(val, port) outw((val), (port)) > > +#define outl_p(val, port) outl((val), (port)) > > + > > +#define inb_p(port) inb((port)) > > +#define inw_p(port) inw((port)) > > +#define inl_p(port) inl((port)) > > + > > +#define outsb_p(port, from, len) outsb(port, from, len) > > +#define outsw_p(port, from, len) outsw(port, from, len) > > +#define outsl_p(port, from, len) outsl(port, from, len) > > + > > +#define insb_p(port, to, len) insb(port, to, len) > > +#define insw_p(port, to, len) insw(port, to, len) > > +#define insl_p(port, to, len) insl(port, to, len) > > Do we actually need any of this in U-Boot? > > Please clean up and remove unused stuff... Well for example "inb"/"outb" is used in "drivers/serial/ns16550.c" and in many other places. So we need to clean drivers and common files first. > > +/* > > + * Given a physical address and a length, return a virtual address > > + * that can be used to access the memory range with the caching > > + * properties specified by "flags". > > + */ > > +#define MAP_NOCACHE (0) > > +#define MAP_WRCOMBINE (0) > > +#define MAP_WRBACK (0) > > +#define MAP_WRTHROUGH (0) > > Needed in U-Boot? Please fix globally. MAP_WRCOMBINE is not used really. While MAP_NOCACHE and MAP_WRBACK are still in use in couple of places together with "map_physmem()". > > +/* Written to pacify arch indepeandant code. > > + * Not used by ARC I/O > > + */ > > +#define _inb inb > > +#define _outb outb > > + > > +#define IO_SPACE_LIMIT 0xffff > > + > > +#define IOMAP_FULL_CACHING 0 > > +#define IOMAP_NOCACHE_SER 1 > > +#define IOMAP_NOCACHE_NONSER 2 > > +#define IOMAP_WRITETHROUGH 3 > > I think you can drop that, too? will do. > > > +/* Can't use the ENTRY macro in linux/linkage.h > > + * gas considers ';' as comment vs. newline > > + */ > > +.macro ARC_ENTRY name > > + .global \name > > + .align 4 > > + \name: > > +.endm > > Is this really correct sytax for this architecture? I would expect > that the "\n" means a newline character ;-) This is GNU Assembler macro syntax - https://sourceware.org/binutils/docs/as/Macro.html#Macro That's how you use parameters passed to macro. So here parameter name is "name" and you use it as "\name" in macro's body. And it works which is proven by built and executed both Linux kernel and U-boot on ARC CPUs. > > +/* > > + * This file is generally used by user-level software, so you need to > > + * be a little careful about namespace pollution etc. Also, we cannot > > + * assume GCC is being used. > > + */ > > + > > +typedef unsigned short __kernel_dev_t; > > +typedef unsigned long __kernel_ino_t; > > +typedef unsigned short __kernel_mode_t; > > +typedef unsigned short __kernel_nlink_t; > > +typedef long __kernel_off_t; > > +typedef int __kernel_pid_t; > > +typedef unsigned short __kernel_ipc_pid_t; > > +typedef unsigned short __kernel_uid_t; > > +typedef unsigned short __kernel_gid_t; > > +typedef unsigned int __kernel_size_t; > > +typedef int __kernel_ssize_t; > > +typedef int __kernel_ptrdiff_t; > > +typedef long __kernel_time_t; > > +typedef long __kernel_suseconds_t; > > +typedef long __kernel_clock_t; > > +typedef int __kernel_daddr_t; > > +typedef char * __kernel_caddr_t; > > +typedef unsigned short __kernel_uid16_t; > > +typedef unsigned short __kernel_gid16_t; > > +typedef unsigned int __kernel_uid32_t; > > +typedef unsigned int __kernel_gid32_t; > > + > > +typedef unsigned short __kernel_old_uid_t; > > +typedef unsigned short __kernel_old_gid_t; > > + > > +#ifdef __GNUC__ > > +typedef long long __kernel_loff_t; > > +#endif > > + > > +typedef struct { > > +#if defined(__KERNEL__) || defined(__USE_ALL) > > + int val[2]; > > +#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */ > > + int __val[2]; > > +#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */ > > +} __kernel_fsid_t; > > + > > +#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) > > + > > +#undef __FD_SET > > +#define __FD_SET(fd, fdsetp) \ > > + (((fd_set *)fdsetp)->fds_bits[fd >> 5] |= (1<<(fd & 31))) > > + > > +#undef __FD_CLR > > +#define __FD_CLR(fd, fdsetp) \ > > + (((fd_set *)fdsetp)->fds_bits[fd >> 5] &= ~(1<<(fd & 31))) > > + > > +#undef __FD_ISSET > > +#define __FD_ISSET(fd, fdsetp) \ > > + ((((fd_set *)fdsetp)->fds_bits[fd >> 5] & (1<<(fd & 31))) != 0) > > + > > Is any of this actually relevant in U-Boot? Once again - "posix_types.h" are very similar in all arches now and so I took ARM's one. If everything or some parts there are useless we may want to clean-up this globally. But I see that in "include/linux/types.h" "__kernel_XXX_t" types are used. > > +#undef __FD_ZERO > > +#define __FD_ZERO(fdsetp) \ > > + (memset (fdsetp, 0, sizeof (*(fd_set *)fdsetp))) > > + > > +#endif > > Note that checkpatch throws warnings here: > > WARNING: space prohibited between function name and open parenthesis '(' > > Please make sure to run all your patches through checkpatch and fix > such errors and warnings! As I mentioned I took this one from ARM so I left it as it is. I might just add explicit mention that my file is a copy. Will it work? > > +#endif /* __ASM_ARC_POSIX_TYPES_H */ > > diff --git a/arch/arc/include/asm/ptrace.h b/arch/arc/include/asm/ptrace.h > > new file mode 100644 > > index 0000000..3b2df87 > > --- /dev/null > > +++ b/arch/arc/include/asm/ptrace.h > > @@ -0,0 +1,101 @@ > > +/* > > + * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. All rights reserved. > > + * > > + * SPDX-License-Identifier: GPL-2.0+ > > + */ > > + > > +#ifndef __ASM_ARC_PTRACE_H > > +#define __ASM_ARC_PTRACE_H > > + > > +#ifndef __ASSEMBLY__ > > + > > +/* THE pt_regs: Defines how regs are saved during entry into kernel */ > > Needed? > > > +/* return 1 if user mode or 0 if kernel mode */ > > +#define user_mode(regs) (regs->status32 & STATUS_U_MASK) > > Certainly not needed, right? > > etc. etc. This is another file taken from Linux kernel source that's why I didn't touch it at all. Regards, Alexey
Dear Alexey, In message <1391088780.3518.33.camel@abrodkin-8560l.internal.synopsys.com> you wrote: > > As it is clearly mentioned in commit message "arcregs.h" came from Linux > sources and that's why kept as it was. You may refer to it here - > https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/arch/arc/include/asm/arcregs.h?id=v3.11 > > So I'm wondering if you insist on fixing all mentioned items in > "arcregs.h" or I may keep it as it is still? This is difficult to impossible for me to decide yet. MY general feeling is that there is an overwhelming amount of code that is completely unused in U-Boot. That should really be dropped. Also, it would help if you could give reasons (I mean, other than "this comes form Linux, so it must be good") why this code should be written as it is. Or, for example, if it is realistic to expect that both BE and LE configurations of your systems will be supported in U-Boot, etc. > Ok, I copy-pasted it from "arch/arm/include/asm/byteorder.h". > And it still has __KERNEL__ - > http://git.denx.de/?p=u-boot.git;a=blob;f=arch/arm/include/asm/byteor> der.h;h=20cce7657e1059a170fd5ef32688cb96064fcd7f;hb=HEAD > > Are we going to fix it for existing arches (note all arches except M68K, > PowerPC and SPARC have it in "byteorder.h")? IIRC it might go away in the context of the Kconfig changes. > > > +#define writew(val, addr) ({ __asm__ __volatile__ ("stw.di %0,[%1]" : > :\ > > > + "r" ((val)), "r" ((addr))); }) > > > + > > > +#define writel(val, addr) ({ __asm__ __volatile__ ("st.di %0,[%1]" : :> \ > > > + "r" ((val)), "r" ((addr))); }) > > > + > > > +#define readb(addr) ({unsigned int val = 0; __asm__ __volatile__ \ > > > + ("ldb.di %0,[%1]" : "=&r" ((val)) : "r" ((addr))); val; }) > > > + > > > +#define readw(addr) ({unsigned int val = 0; __asm__ __volatile__ \ > > > + ("ldw.di %0,[%1]" : "=&r" ((val)) : "r" ((addr))); val; }) > > > + > > > +#define readl(addr) ({unsigned int val = 0; __asm__ __volatile__ \ > > > + ("ld.di %0,[%1]" : "=&r" ((val)) : "r"((addr))); val; }) > > > > As far as I can tell there is no type checking for the arguments > > passed here. Can this please be added, so the compiler can catch when > > you for example try to use a writel() on a address that points to char > > only? > > Good suggestion, but I'm wondering if this kind of checks are already > implemented in other arches - may I have a reference? It should be sufficient to use inline functions instead of macros; for example something like extern inline u8 readb(const volatile unsigned char __iomem *addr) { u8 val; __asm__ __volatile__( "ldb.di %0,[%1]" : "=&r" ((val)) : "r" ((addr))); return val; } > > > +/* > > > + * Generic virtual read/write > > > + */ > > > +#define iomem_valid_addr(iomem, sz) (1) > > > +#define iomem_to_phys(iomem) (iomem) > > > + > > > +#ifdef __io > > > +#define outb(v, p) __raw_writeb(v, __io(p)) > > > +#define outw(v, p) __raw_writew(cpu_to_le16(v), __io(p)) > > > +#define outl(v, p) __raw_writel(cpu_to_le32(v), __io(p)) > > > + > > > +#define inb(p) ({ unsigned int __v = __raw_readb(__io(p)); __v; }) > > > +#define inw(p) ({ unsigned int __v = le16_to_cpu(__raw_readw(__io(p)> )); __v; }) > > > +#define inl(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(__io(p)> )); __v; }) > > > + > > > +#define outsb(p, d, l) __raw_writesb(__io(p), d, l) > > > +#define outsw(p, d, l) __raw_writesw(__io(p), d, l) > > > +#define outsl(p, d, l) __raw_writesl(__io(p), d, l) > > > + > > > +#define insb(p, d, l) __raw_readsb(__io(p), d, l) > > > +#define insw(p, d, l) __raw_readsw(__io(p), d, l) > > > +#define insl(p, d, l) __raw_readsl(__io(p), d, l) > > > +#endif > > > + > > > +#define outb_p(val, port) outb((val), (port)) > > > +#define outw_p(val, port) outw((val), (port)) > > > +#define outl_p(val, port) outl((val), (port)) > > > + > > > +#define inb_p(port) inb((port)) > > > +#define inw_p(port) inw((port)) > > > +#define inl_p(port) inl((port)) > > > + > > > +#define outsb_p(port, from, len) outsb(port, from, len) > > > +#define outsw_p(port, from, len) outsw(port, from, len) > > > +#define outsl_p(port, from, len) outsl(port, from, len) > > > + > > > +#define insb_p(port, to, len) insb(port, to, len) > > > +#define insw_p(port, to, len) insw(port, to, len) > > > +#define insl_p(port, to, len) insl(port, to, len) > > > > Do we actually need any of this in U-Boot? > > > > Please clean up and remove unused stuff... > > Well for example "inb"/"outb" is used in "drivers/serial/ns16550.c" and > in many other places. So we need to clean drivers and common files > first. Are you sure all of these are actually used? > > > +/* > > > + * Given a physical address and a length, return a virtual address > > > + * that can be used to access the memory range with the caching > > > + * properties specified by "flags". > > > + */ > > > +#define MAP_NOCACHE (0) > > > +#define MAP_WRCOMBINE (0) > > > +#define MAP_WRBACK (0) > > > +#define MAP_WRTHROUGH (0) > > > > Needed in U-Boot? Please fix globally. > > MAP_WRCOMBINE is not used really. > While MAP_NOCACHE and MAP_WRBACK are still in use in couple of places > together with "map_physmem()". So drop the unused, please... > > > +/* Written to pacify arch indepeandant code. > > > + * Not used by ARC I/O > > > + */ > > > +#define _inb inb > > > +#define _outb outb > > > + > > > +#define IO_SPACE_LIMIT 0xffff > > > + > > > +#define IOMAP_FULL_CACHING 0 > > > +#define IOMAP_NOCACHE_SER 1 > > > +#define IOMAP_NOCACHE_NONSER 2 > > > +#define IOMAP_WRITETHROUGH 3 > > > > I think you can drop that, too? > > will do. > > > > > +/* Can't use the ENTRY macro in linux/linkage.h > > > + * gas considers ';' as comment vs. newline > > > + */ > > > +.macro ARC_ENTRY name > > > + .global \name > > > + .align 4 > > > + \name: > > > +.endm > > > > Is this really correct sytax for this architecture? I would expect > > that the "\n" means a newline character ;-) > > This is GNU Assembler macro syntax - > https://sourceware.org/binutils/docs/as/Macro.html#Macro > That's how you use parameters passed to macro. > So here parameter name is "name" and you use it as "\name" in macro's > body. > > And it works which is proven by built and executed both Linux kernel and > U-boot on ARC CPUs. > > > > +/* > > > + * This file is generally used by user-level software, so you need to > > > + * be a little careful about namespace pollution etc. Also, we cannot > > > + * assume GCC is being used. > > > + */ > > > + > > > +typedef unsigned short __kernel_dev_t; > > > +typedef unsigned long __kernel_ino_t; > > > +typedef unsigned short __kernel_mode_t; > > > +typedef unsigned short __kernel_nlink_t; > > > +typedef long __kernel_off_t; > > > +typedef int __kernel_pid_t; > > > +typedef unsigned short __kernel_ipc_pid_t; > > > +typedef unsigned short __kernel_uid_t; > > > +typedef unsigned short __kernel_gid_t; > > > +typedef unsigned int __kernel_size_t; > > > +typedef int __kernel_ssize_t; > > > +typedef int __kernel_ptrdiff_t; > > > +typedef long __kernel_time_t; > > > +typedef long __kernel_suseconds_t; > > > +typedef long __kernel_clock_t; > > > +typedef int __kernel_daddr_t; > > > +typedef char * __kernel_caddr_t; > > > +typedef unsigned short __kernel_uid16_t; > > > +typedef unsigned short __kernel_gid16_t; > > > +typedef unsigned int __kernel_uid32_t; > > > +typedef unsigned int __kernel_gid32_t; > > > + > > > +typedef unsigned short __kernel_old_uid_t; > > > +typedef unsigned short __kernel_old_gid_t; > > > + > > > +#ifdef __GNUC__ > > > +typedef long long __kernel_loff_t; > > > +#endif > > > + > > > +typedef struct { > > > +#if defined(__KERNEL__) || defined(__USE_ALL) > > > + int val[2]; > > > +#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */ > > > + int __val[2]; > > > +#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */ > > > +} __kernel_fsid_t; > > > + > > > +#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) > > > + > > > +#undef __FD_SET > > > +#define __FD_SET(fd, fdsetp) \ > > > + (((fd_set *)fdsetp)->fds_bits[fd >> 5] |= (1<<(fd & 31))) > > > + > > > +#undef __FD_CLR > > > +#define __FD_CLR(fd, fdsetp) \ > > > + (((fd_set *)fdsetp)->fds_bits[fd >> 5] &= ~(1<<(fd & 31))) > > > + > > > +#undef __FD_ISSET > > > +#define __FD_ISSET(fd, fdsetp) \ > > > + ((((fd_set *)fdsetp)->fds_bits[fd >> 5] & (1<<(fd & 31))) != 0) > > > + > > > > Is any of this actually relevant in U-Boot? > > Once again - "posix_types.h" are very similar in all arches now and so I > took ARM's one. If everything or some parts there are useless we may > want to clean-up this globally. It appears you avoid to answer my questions. Referring to existing sub-optimal code is not really an answer. But you are right, if othe rarchitectures include such stuff, they should be cleaned up, too. Patches are always welcome. > > Note that checkpatch throws warnings here: > > > > WARNING: space prohibited between function name and open parenthesis '(' > > > > Please make sure to run all your patches through checkpatch and fix > > such errors and warnings! > > As I mentioned I took this one from ARM so I left it as it is. > I might just add explicit mention that my file is a copy. > Will it work? No. Everybody can make mistakes. But to knowingly copy poor code would be... well, no. > > > +#endif /* __ASM_ARC_POSIX_TYPES_H */ > > > diff --git a/arch/arc/include/asm/ptrace.h b/arch/arc/include/asm/ptrac> e.h > > > new file mode 100644 > > > index 0000000..3b2df87 > > > --- /dev/null > > > +++ b/arch/arc/include/asm/ptrace.h > > > @@ -0,0 +1,101 @@ > > > +/* > > > + * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. All rights > reserved. > > > + * > > > + * SPDX-License-Identifier: GPL-2.0+ > > > + */ > > > + > > > +#ifndef __ASM_ARC_PTRACE_H > > > +#define __ASM_ARC_PTRACE_H > > > + > > > +#ifndef __ASSEMBLY__ > > > + > > > +/* THE pt_regs: Defines how regs are saved during entry into kernel */ > > > > Needed? > > > > > +/* return 1 if user mode or 0 if kernel mode */ > > > +#define user_mode(regs) (regs->status32 & STATUS_U_MASK) > > > > Certainly not needed, right? > > > > etc. etc. > > This is another file taken from Linux kernel source that's why I didn't > touch it at all. Maybe we can take only the parts that are actually needed or useful? Best regards, Wolfgang Denk
Hello Wolfgang, On Fri, 2014-01-31 at 00:10 +0100, Wolfgang Denk wrote: > Dear Alexey, > > In message <1391088780.3518.33.camel@abrodkin-8560l.internal.synopsys.com> you wrote: > > > > As it is clearly mentioned in commit message "arcregs.h" came from Linux > > sources and that's why kept as it was. You may refer to it here - > > https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/arch/arc/include/asm/arcregs.h?id=v3.11 > > > > So I'm wondering if you insist on fixing all mentioned items in > > "arcregs.h" or I may keep it as it is still? > > This is difficult to impossible for me to decide yet. MY general > feeling is that there is an overwhelming amount of code that is > completely unused in U-Boot. That should really be dropped. > > Also, it would help if you could give reasons (I mean, other than > "this comes form Linux, so it must be good") why this code should be > written as it is. > > Or, for example, if it is realistic to expect that both BE and LE > configurations of your systems will be supported in U-Boot, etc. Your comments and reasons make perfect sense so I think I'll do a massive clean-up of those headers. It will definitely benefit U-Boot and hopefully then similar clean-up will be accepted in Linux - everybody will be happy. And indeed I do expect to support both LE and BE flavors of ARC CPUs. Because right away one of the active users (I mean company here not individual) use BE ARC CPU. > > Ok, I copy-pasted it from "arch/arm/include/asm/byteorder.h". > > And it still has __KERNEL__ - > > http://git.denx.de/?p=u-boot.git;a=blob;f=arch/arm/include/asm/byteor> der.h;h=20cce7657e1059a170fd5ef32688cb96064fcd7f;hb=HEAD > > > > Are we going to fix it for existing arches (note all arches except M68K, > > PowerPC and SPARC have it in "byteorder.h")? > > IIRC it might go away in the context of the Kconfig changes. Good. I fixed mine, hope others will follow. > > > > +#define writew(val, addr) ({ __asm__ __volatile__ ("stw.di %0,[%1]" : > :\ > > > > + "r" ((val)), "r" ((addr))); }) > > > > + > > > > +#define writel(val, addr) ({ __asm__ __volatile__ ("st.di %0,[%1]" : :> \ > > > > + "r" ((val)), "r" ((addr))); }) > > > > + > > > > +#define readb(addr) ({unsigned int val = 0; __asm__ __volatile__ \ > > > > + ("ldb.di %0,[%1]" : "=&r" ((val)) : "r" ((addr))); val; }) > > > > + > > > > +#define readw(addr) ({unsigned int val = 0; __asm__ __volatile__ \ > > > > + ("ldw.di %0,[%1]" : "=&r" ((val)) : "r" ((addr))); val; }) > > > > + > > > > +#define readl(addr) ({unsigned int val = 0; __asm__ __volatile__ \ > > > > + ("ld.di %0,[%1]" : "=&r" ((val)) : "r"((addr))); val; }) > > > > > > As far as I can tell there is no type checking for the arguments > > > passed here. Can this please be added, so the compiler can catch when > > > you for example try to use a writel() on a address that points to char > > > only? > > > > Good suggestion, but I'm wondering if this kind of checks are already > > implemented in other arches - may I have a reference? > > It should be sufficient to use inline functions instead of macros; for > example something like > > extern inline u8 readb(const volatile unsigned char __iomem *addr) > { > u8 val; > > __asm__ __volatile__( > "ldb.di %0,[%1]" : "=&r" ((val)) : "r" ((addr))); > > return val; > } Good suggestion. Will definitely replace macros with in-lined functions. Still I don't quite understand how this implementation helps with data type checking. I may feed any address and compiler happily puts 1 byte aligned address as argument for word load/store instruction. I'm not sure if this is a flaw of our GCC port or I'm doing something wrong here. > > > > +/* > > > > + * Generic virtual read/write > > > > + */ > > > > +#define iomem_valid_addr(iomem, sz) (1) > > > > +#define iomem_to_phys(iomem) (iomem) > > > > + > > > > +#ifdef __io > > > > +#define outb(v, p) __raw_writeb(v, __io(p)) > > > > +#define outw(v, p) __raw_writew(cpu_to_le16(v), __io(p)) > > > > +#define outl(v, p) __raw_writel(cpu_to_le32(v), __io(p)) > > > > + > > > > +#define inb(p) ({ unsigned int __v = __raw_readb(__io(p)); __v; }) > > > > +#define inw(p) ({ unsigned int __v = le16_to_cpu(__raw_readw(__io(p)> )); __v; }) > > > > +#define inl(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(__io(p)> )); __v; }) > > > > + > > > > +#define outsb(p, d, l) __raw_writesb(__io(p), d, l) > > > > +#define outsw(p, d, l) __raw_writesw(__io(p), d, l) > > > > +#define outsl(p, d, l) __raw_writesl(__io(p), d, l) > > > > + > > > > +#define insb(p, d, l) __raw_readsb(__io(p), d, l) > > > > +#define insw(p, d, l) __raw_readsw(__io(p), d, l) > > > > +#define insl(p, d, l) __raw_readsl(__io(p), d, l) > > > > +#endif > > > > + > > > > +#define outb_p(val, port) outb((val), (port)) > > > > +#define outw_p(val, port) outw((val), (port)) > > > > +#define outl_p(val, port) outl((val), (port)) > > > > + > > > > +#define inb_p(port) inb((port)) > > > > +#define inw_p(port) inw((port)) > > > > +#define inl_p(port) inl((port)) > > > > + > > > > +#define outsb_p(port, from, len) outsb(port, from, len) > > > > +#define outsw_p(port, from, len) outsw(port, from, len) > > > > +#define outsl_p(port, from, len) outsl(port, from, len) > > > > + > > > > +#define insb_p(port, to, len) insb(port, to, len) > > > > +#define insw_p(port, to, len) insw(port, to, len) > > > > +#define insl_p(port, to, len) insl(port, to, len) > > > > > > Do we actually need any of this in U-Boot? > > > > > > Please clean up and remove unused stuff... > > > > Well for example "inb"/"outb" is used in "drivers/serial/ns16550.c" and > > in many other places. So we need to clean drivers and common files > > first. > > Are you sure all of these are actually used? Well, most of these are used here and there. And the problem I see is we have many very similar accessors in U-Boot. And people randomly (or based on their preference) use either of them. Let's look at "outb". Different arches define it as an alias for "writeb", "__raw_writeb", "out_8" etc. Now I see "outb" is used in "drivers/serial/ns16550.c" as I mentioned. And this is one of the most common serial port devices right? "writeb" is used everywhere. "__raw_writeb" is used in "drivers/mtd/cfi_flash.c" And the same picture with other accessors. It would be good if we re-visit this topic and come up with some guide that explains which accessers could be used and in which cases. In current situation it looks like every arch sort of emulates accessors of other platform. For example this is a comment from "io.h" for "SH" architecture: ===== The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space ===== And indeed I may remove these "in/out" accessors from "ARC" port. But as a maintainer/submitter of ARC port I'd like my users to have access to all (or at least most of) already existing and working drivers and common things (like commands etc). But IMHO it will be unfair. ARC users will complain on "buggy"/obsolete drivers while users of all other architectures will rest in pease and just use existing code-base. That's why I would prefer to have an accessors clean-up as a separate movement among all arches at once - so everybody gets affected and many hands will start fixing stuff all together. > > > > +/* > > > > + * Given a physical address and a length, return a virtual address > > > > + * that can be used to access the memory range with the caching > > > > + * properties specified by "flags". > > > > + */ > > > > +#define MAP_NOCACHE (0) > > > > +#define MAP_WRCOMBINE (0) > > > > +#define MAP_WRBACK (0) > > > > +#define MAP_WRTHROUGH (0) > > > > > > Needed in U-Boot? Please fix globally. > > > > MAP_WRCOMBINE is not used really. > > While MAP_NOCACHE and MAP_WRBACK are still in use in couple of places > > together with "map_physmem()". > > So drop the unused, please... Already did. > > > > +/* Written to pacify arch indepeandant code. > > > > + * Not used by ARC I/O > > > > + */ > > > > +#define _inb inb > > > > +#define _outb outb > > > > + > > > > +#define IO_SPACE_LIMIT 0xffff > > > > + > > > > +#define IOMAP_FULL_CACHING 0 > > > > +#define IOMAP_NOCACHE_SER 1 > > > > +#define IOMAP_NOCACHE_NONSER 2 > > > > +#define IOMAP_WRITETHROUGH 3 > > > > > > I think you can drop that, too? > > > > will do. > > > > > > > +/* Can't use the ENTRY macro in linux/linkage.h > > > > + * gas considers ';' as comment vs. newline > > > > + */ > > > > +.macro ARC_ENTRY name > > > > + .global \name > > > > + .align 4 > > > > + \name: > > > > +.endm > > > > > > Is this really correct sytax for this architecture? I would expect > > > that the "\n" means a newline character ;-) > > > > This is GNU Assembler macro syntax - > > https://sourceware.org/binutils/docs/as/Macro.html#Macro > > That's how you use parameters passed to macro. > > So here parameter name is "name" and you use it as "\name" in macro's > > body. > > > > And it works which is proven by built and executed both Linux kernel and > > U-boot on ARC CPUs. > > > > > > +/* > > > > + * This file is generally used by user-level software, so you need to > > > > + * be a little careful about namespace pollution etc. Also, we cannot > > > > + * assume GCC is being used. > > > > + */ > > > > + > > > > +typedef unsigned short __kernel_dev_t; > > > > +typedef unsigned long __kernel_ino_t; > > > > +typedef unsigned short __kernel_mode_t; > > > > +typedef unsigned short __kernel_nlink_t; > > > > +typedef long __kernel_off_t; > > > > +typedef int __kernel_pid_t; > > > > +typedef unsigned short __kernel_ipc_pid_t; > > > > +typedef unsigned short __kernel_uid_t; > > > > +typedef unsigned short __kernel_gid_t; > > > > +typedef unsigned int __kernel_size_t; > > > > +typedef int __kernel_ssize_t; > > > > +typedef int __kernel_ptrdiff_t; > > > > +typedef long __kernel_time_t; > > > > +typedef long __kernel_suseconds_t; > > > > +typedef long __kernel_clock_t; > > > > +typedef int __kernel_daddr_t; > > > > +typedef char * __kernel_caddr_t; > > > > +typedef unsigned short __kernel_uid16_t; > > > > +typedef unsigned short __kernel_gid16_t; > > > > +typedef unsigned int __kernel_uid32_t; > > > > +typedef unsigned int __kernel_gid32_t; > > > > + > > > > +typedef unsigned short __kernel_old_uid_t; > > > > +typedef unsigned short __kernel_old_gid_t; > > > > + > > > > +#ifdef __GNUC__ > > > > +typedef long long __kernel_loff_t; > > > > +#endif > > > > + > > > > +typedef struct { > > > > +#if defined(__KERNEL__) || defined(__USE_ALL) > > > > + int val[2]; > > > > +#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */ > > > > + int __val[2]; > > > > +#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */ > > > > +} __kernel_fsid_t; > > > > + > > > > +#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) > > > > + > > > > +#undef __FD_SET > > > > +#define __FD_SET(fd, fdsetp) \ > > > > + (((fd_set *)fdsetp)->fds_bits[fd >> 5] |= (1<<(fd & 31))) > > > > + > > > > +#undef __FD_CLR > > > > +#define __FD_CLR(fd, fdsetp) \ > > > > + (((fd_set *)fdsetp)->fds_bits[fd >> 5] &= ~(1<<(fd & 31))) > > > > + > > > > +#undef __FD_ISSET > > > > +#define __FD_ISSET(fd, fdsetp) \ > > > > + ((((fd_set *)fdsetp)->fds_bits[fd >> 5] & (1<<(fd & 31))) != 0) > > > > + > > > > > > Is any of this actually relevant in U-Boot? > > > > Once again - "posix_types.h" are very similar in all arches now and so I > > took ARM's one. If everything or some parts there are useless we may > > want to clean-up this globally. > > It appears you avoid to answer my questions. Referring to existing > sub-optimal code is not really an answer. But you are right, if othe > rarchitectures include such stuff, they should be cleaned up, too. > > Patches are always welcome. Sure there're questions I don't have a good technical answer for. I have to confess that I'm not an expert of each and every tiny bit of U-boot. But I see that those types in Linux sources are defined in single one header "include/linux/types.h". And all arches use it. From this I can make a conclusion that each working implementation rom other architecture will work for ARC. So did I - copied and it worked. I would say that in U-Boot we need to unify lots of things - for example unified init sequences is a good movement but even there I see tons of ifdefs for each and other corner case. So if I want to fix every flaw of existing U-Boot that I met during implementation of my port I would spend many months on this work while ARC port still won't be in upstream. That's why I decided to fix non-ARC sources that block ARC port form being useful (more than 10 patches were accepted) and then submit ARC part which looks as much as possible similarly to existing architectures. This similarity will allow even automatic batch fixing of things. Otherwise each time you'll need to figure out what happen here and there and why there're different implementations of similar or even same things. Saying all this I'm not withdrawing from doing all these fixes anytime later. As an active user and contributor I'm interested in having U-boot sources in good shape - it benefits me in the end. > > > Note that checkpatch throws warnings here: > > > > > > WARNING: space prohibited between function name and open parenthesis '(' > > > > > > Please make sure to run all your patches through checkpatch and fix > > > such errors and warnings! > > > > As I mentioned I took this one from ARM so I left it as it is. > > I might just add explicit mention that my file is a copy. > > Will it work? > > No. Everybody can make mistakes. But to knowingly copy poor code > would be... well, no. Understood. > > > > +#endif /* __ASM_ARC_POSIX_TYPES_H */ > > > > diff --git a/arch/arc/include/asm/ptrace.h b/arch/arc/include/asm/ptrac> e.h > > > > new file mode 100644 > > > > index 0000000..3b2df87 > > > > --- /dev/null > > > > +++ b/arch/arc/include/asm/ptrace.h > > > > @@ -0,0 +1,101 @@ > > > > +/* > > > > + * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. All rights > reserved. > > > > + * > > > > + * SPDX-License-Identifier: GPL-2.0+ > > > > + */ > > > > + > > > > +#ifndef __ASM_ARC_PTRACE_H > > > > +#define __ASM_ARC_PTRACE_H > > > > + > > > > +#ifndef __ASSEMBLY__ > > > > + > > > > +/* THE pt_regs: Defines how regs are saved during entry into kernel */ > > > > > > Needed? > > > > > > > +/* return 1 if user mode or 0 if kernel mode */ > > > > +#define user_mode(regs) (regs->status32 & STATUS_U_MASK) > > > > > > Certainly not needed, right? > > > > > > etc. etc. > > > > This is another file taken from Linux kernel source that's why I didn't > > touch it at all. > > Maybe we can take only the parts that are actually needed or useful? As with "arcregs.h" I'll clean this one up heavily so it has only useful pieces. Regard, Alexey
diff --git a/arch/arc/include/asm/arch-arc700/hardware.h b/arch/arc/include/asm/arch-arc700/hardware.h new file mode 100644 index 0000000..e69de29 diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h new file mode 100644 index 0000000..87b0a60 --- /dev/null +++ b/arch/arc/include/asm/arcregs.h @@ -0,0 +1,324 @@ +/* + * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. All rights reserved. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _ASM_ARC_ARCREGS_H +#define _ASM_ARC_ARCREGS_H + +#ifdef __KERNEL__ + +/* Build Configuration Registers */ +#define ARC_REG_DCCMBASE_BCR 0x61 /* DCCM Base Addr */ +#define ARC_REG_CRC_BCR 0x62 +#define ARC_REG_DVFB_BCR 0x64 +#define ARC_REG_EXTARITH_BCR 0x65 +#define ARC_REG_VECBASE_BCR 0x68 +#define ARC_REG_PERIBASE_BCR 0x69 +#define ARC_REG_FP_BCR 0x6B /* Single-Precision FPU */ +#define ARC_REG_DPFP_BCR 0x6C /* Dbl Precision FPU */ +#define ARC_REG_DCCM_BCR 0x74 /* DCCM Present + SZ */ +#define ARC_REG_TIMERS_BCR 0x75 +#define ARC_REG_ICCM_BCR 0x78 +#define ARC_REG_XY_MEM_BCR 0x79 +#define ARC_REG_MAC_BCR 0x7a +#define ARC_REG_MUL_BCR 0x7b +#define ARC_REG_SWAP_BCR 0x7c +#define ARC_REG_NORM_BCR 0x7d +#define ARC_REG_MIXMAX_BCR 0x7e +#define ARC_REG_BARREL_BCR 0x7f +#define ARC_REG_D_UNCACH_BCR 0x6A + +/* status32 Bits Positions */ +#define STATUS_AE_BIT 5 /* Exception active */ +#define STATUS_DE_BIT 6 /* PC is in delay slot */ +#define STATUS_U_BIT 7 /* User/Kernel mode */ +#define STATUS_L_BIT 12 /* Loop inhibit */ + +/* These masks correspond to the status word(STATUS_32) bits */ +#define STATUS_AE_MASK (1<<STATUS_AE_BIT) +#define STATUS_DE_MASK (1<<STATUS_DE_BIT) +#define STATUS_U_MASK (1<<STATUS_U_BIT) +#define STATUS_L_MASK (1<<STATUS_L_BIT) + +/* + * ECR: Exception Cause Reg bits-n-pieces + * [23:16] = Exception Vector + * [15: 8] = Exception Cause Code + * [ 7: 0] = Exception Parameters (for certain types only) + */ +#define ECR_VEC_MASK 0xff0000 +#define ECR_CODE_MASK 0x00ff00 +#define ECR_PARAM_MASK 0x0000ff + +/* Exception Cause Vector Values */ +#define ECR_V_INSN_ERR 0x02 +#define ECR_V_MACH_CHK 0x20 +#define ECR_V_ITLB_MISS 0x21 +#define ECR_V_DTLB_MISS 0x22 +#define ECR_V_PROTV 0x23 +#define ECR_V_TRAP 0x25 + +/* Protection Violation Exception Cause Code Values */ +#define ECR_C_PROTV_INST_FETCH 0x00 +#define ECR_C_PROTV_LOAD 0x01 +#define ECR_C_PROTV_STORE 0x02 +#define ECR_C_PROTV_XCHG 0x03 +#define ECR_C_PROTV_MISALIG_DATA 0x04 + +#define ECR_C_BIT_PROTV_MISALIG_DATA 10 + +/* Machine Check Cause Code Values */ +#define ECR_C_MCHK_DUP_TLB 0x01 + +/* DTLB Miss Exception Cause Code Values */ +#define ECR_C_BIT_DTLB_LD_MISS 8 +#define ECR_C_BIT_DTLB_ST_MISS 9 + +/* Dummy ECR values for Interrupts */ +#define event_IRQ1 0x0031abcd +#define event_IRQ2 0x0032abcd + +/* Auxiliary registers */ +#define AUX_IDENTITY 4 +#define AUX_INTR_VEC_BASE 0x25 + + +/* + * Floating Pt Registers + * Status regs are read-only (build-time) so need not be saved/restored + */ +#define ARC_AUX_FP_STAT 0x300 +#define ARC_AUX_DPFP_1L 0x301 +#define ARC_AUX_DPFP_1H 0x302 +#define ARC_AUX_DPFP_2L 0x303 +#define ARC_AUX_DPFP_2H 0x304 +#define ARC_AUX_DPFP_STAT 0x305 + +#ifndef __ASSEMBLY__ + +/* + ****************************************************************** + * Inline ASM macros to read/write AUX Regs + * Essentially invocation of lr/sr insns from "C" + */ + +#if 1 + +#define read_aux_reg(reg) __builtin_arc_lr(reg) + +/* gcc builtin sr needs reg param to be long immediate */ +#define write_aux_reg(reg_immed, val) \ + __builtin_arc_sr((unsigned int)val, reg_immed) + +#else + +#define read_aux_reg(reg) \ +({ \ + unsigned int __ret; \ + __asm__ __volatile__( \ + " lr %0, [%1]" \ + : "=r"(__ret) \ + : "i"(reg)); \ + __ret; \ +}) + +/* + * Aux Reg address is specified as long immediate by caller + * e.g. + * write_aux_reg(0x69, some_val); + * This generates tightest code. + */ +#define write_aux_reg(reg_imm, val) \ +({ \ + __asm__ __volatile__( \ + " sr %0, [%1]\n" \ + : \ + : "ir"(val), "i"(reg_imm)); \ +}) + +/* + * Aux Reg address is specified in a variable + * * e.g. + * reg_num = 0x69 + * write_aux_reg2(reg_num, some_val); + * This has to generate glue code to load the reg num from + * memory to a reg hence not recommended. + */ +#define write_aux_reg2(reg_in_var, val) \ +({ \ + unsigned int tmp; \ + \ + __asm__ __volatile__( \ + " ld %0, [%2]\n\t" \ + " sr %1, [%0]\n\t" \ + : "=&r"(tmp) \ + : "r"(val), "memory"(®_in_var)); \ +}) + +#endif + +#define READ_BCR(reg, into) \ +{ \ + unsigned int tmp; \ + tmp = read_aux_reg(reg); \ + if (sizeof(tmp) == sizeof(into)) { \ + into = *((typeof(into) *)&tmp); \ + } else { \ + extern void bogus_undefined(void); \ + bogus_undefined(); \ + } \ +} + +#define WRITE_BCR(reg, into) \ +{ \ + unsigned int tmp; \ + if (sizeof(tmp) == sizeof(into)) { \ + tmp = (*(unsigned int *)(into)); \ + write_aux_reg(reg, tmp); \ + } else { \ + extern void bogus_undefined(void); \ + bogus_undefined(); \ + } \ +} + +/* Helpers */ +#define TO_KB(bytes) ((bytes) >> 10) +#define TO_MB(bytes) (TO_KB(bytes) >> 10) +#define PAGES_TO_KB(n_pages) ((n_pages) << (PAGE_SHIFT - 10)) +#define PAGES_TO_MB(n_pages) (PAGES_TO_KB(n_pages) >> 10) + +#ifdef CONFIG_ARC_FPU_SAVE_RESTORE +/* These DPFP regs need to be saved/restored across ctx-sw */ +struct arc_fpu { + struct { + unsigned int l, h; + } aux_dpfp[2]; +}; +#endif + +/* + *************************************************************** + * Build Configuration Registers, with encoded hardware config + */ +struct bcr_identity { +#ifdef CONFIG_CPU_BIG_ENDIAN + unsigned int chip_id:16, cpu_id:8, family:8; +#else + unsigned int family:8, cpu_id:8, chip_id:16; +#endif +}; + +#define EXTN_SWAP_VALID 0x1 +#define EXTN_NORM_VALID 0x2 +#define EXTN_MINMAX_VALID 0x2 +#define EXTN_BARREL_VALID 0x2 + +struct bcr_extn { +#ifdef CONFIG_CPU_BIG_ENDIAN + unsigned int pad:20, crc:1, ext_arith:2, mul:2, barrel:2, minmax:2, + norm:2, swap:1; +#else + unsigned int swap:1, norm:2, minmax:2, barrel:2, mul:2, ext_arith:2, + crc:1, pad:20; +#endif +}; + +/* DSP Options Ref Manual */ +struct bcr_extn_mac_mul { +#ifdef CONFIG_CPU_BIG_ENDIAN + unsigned int pad:16, type:8, ver:8; +#else + unsigned int ver:8, type:8, pad:16; +#endif +}; + +struct bcr_extn_xymem { +#ifdef CONFIG_CPU_BIG_ENDIAN + unsigned int ram_org:2, num_banks:4, bank_sz:4, ver:8; +#else + unsigned int ver:8, bank_sz:4, num_banks:4, ram_org:2; +#endif +}; + +struct bcr_perip { +#ifdef CONFIG_CPU_BIG_ENDIAN + unsigned int start:8, pad2:8, sz:8, pad:8; +#else + unsigned int pad:8, sz:8, pad2:8, start:8; +#endif +}; +struct bcr_iccm { +#ifdef CONFIG_CPU_BIG_ENDIAN + unsigned int base:16, pad:5, sz:3, ver:8; +#else + unsigned int ver:8, sz:3, pad:5, base:16; +#endif +}; + +/* DCCM Base Address Register: ARC_REG_DCCMBASE_BCR */ +struct bcr_dccm_base { +#ifdef CONFIG_CPU_BIG_ENDIAN + unsigned int addr:24, ver:8; +#else + unsigned int ver:8, addr:24; +#endif +}; + +/* DCCM RAM Configuration Register: ARC_REG_DCCM_BCR */ +struct bcr_dccm { +#ifdef CONFIG_CPU_BIG_ENDIAN + unsigned int res:21, sz:3, ver:8; +#else + unsigned int ver:8, sz:3, res:21; +#endif +}; + +/* Both SP and DP FPU BCRs have same format */ +struct bcr_fp { +#ifdef CONFIG_CPU_BIG_ENDIAN + unsigned int fast:1, ver:8; +#else + unsigned int ver:8, fast:1; +#endif +}; + +/* + ******************************************************************* + * Generic structures to hold build configuration used at runtime + */ + +struct cpuinfo_arc_mmu { + unsigned int ver, pg_sz, sets, ways, u_dtlb, u_itlb, num_tlb; +}; + +struct cpuinfo_arc_cache { + unsigned int sz, line_len, assoc, ver; +}; + +struct cpuinfo_arc_ccm { + unsigned int base_addr, sz; +}; + +struct cpuinfo_arc { + struct cpuinfo_arc_cache icache, dcache; + struct cpuinfo_arc_mmu mmu; + struct bcr_identity core; + unsigned int timers; + unsigned int vec_base; + unsigned int uncached_base; + struct cpuinfo_arc_ccm iccm, dccm; + struct bcr_extn extn; + struct bcr_extn_xymem extn_xymem; + struct bcr_extn_mac_mul extn_mac_mul; + struct bcr_fp fp, dpfp; +}; + +extern struct cpuinfo_arc cpuinfo_arc700[]; + +#endif /* __ASEMBLY__ */ + +#endif /* __KERNEL__ */ + +#endif /* _ASM_ARC_ARCREGS_H */ diff --git a/arch/arc/include/asm/bitops.h b/arch/arc/include/asm/bitops.h new file mode 100644 index 0000000..85721aa --- /dev/null +++ b/arch/arc/include/asm/bitops.h @@ -0,0 +1,19 @@ +/* + * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __ASM_ARC_BITOPS_H +#define __ASM_ARC_BITOPS_H + +/* + * hweightN: returns the hamming weight (i.e. the number + * of bits set) of a N-bit word + */ + +#define hweight32(x) generic_hweight32(x) +#define hweight16(x) generic_hweight16(x) +#define hweight8(x) generic_hweight8(x) + +#endif /* __ASM_ARC_BITOPS_H */ diff --git a/arch/arc/include/asm/byteorder.h b/arch/arc/include/asm/byteorder.h new file mode 100644 index 0000000..9057624 --- /dev/null +++ b/arch/arc/include/asm/byteorder.h @@ -0,0 +1,23 @@ +/* + * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __ASM_ARC_BYTEORDER_H +#define __ASM_ARC_BYTEORDER_H + +#include <asm/types.h> + +#if !defined(__STRICT_ANSI__) || defined(__KERNEL__) + #define __BYTEORDER_HAS_U64__ + #define __SWAB_64_THRU_32__ +#endif + +#ifndef CONFIG_SYS_BIG_ENDIAN + #include <linux/byteorder/little_endian.h> +#else + #include <linux/byteorder/big_endian.h> +#endif /* CONFIG_SYS_BIG_ENDIAN */ + +#endif /* ASM_ARC_BYTEORDER_H */ diff --git a/arch/arc/include/asm/cache.h b/arch/arc/include/asm/cache.h new file mode 100644 index 0000000..16e7568 --- /dev/null +++ b/arch/arc/include/asm/cache.h @@ -0,0 +1,23 @@ +/* + * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __ASM_ARC_CACHE_H +#define __ASM_ARC_CACHE_H + +#include <config.h> + +/* + * The current upper bound for ARC L1 data cache line sizes is 128 bytes. + * We use that value for aligning DMA buffers unless the board config has + * specified an alternate cache line size. + */ +#ifdef CONFIG_SYS_CACHELINE_SIZE +#define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE +#else +#define ARCH_DMA_MINALIGN 128 +#endif + +#endif /* __ASM_ARC_CACHE_H */ diff --git a/arch/arc/include/asm/config.h b/arch/arc/include/asm/config.h new file mode 100644 index 0000000..5761def --- /dev/null +++ b/arch/arc/include/asm/config.h @@ -0,0 +1,12 @@ +/* + * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __ASM_ARC_CONFIG_H_ +#define __ASM_ARC_CONFIG_H_ + +#define CONFIG_LMB + +#endif /*__ASM_ARC_CONFIG_H_ */ diff --git a/arch/arc/include/asm/errno.h b/arch/arc/include/asm/errno.h new file mode 100644 index 0000000..4c82b50 --- /dev/null +++ b/arch/arc/include/asm/errno.h @@ -0,0 +1 @@ +#include <asm-generic/errno.h> diff --git a/arch/arc/include/asm/global_data.h b/arch/arc/include/asm/global_data.h new file mode 100644 index 0000000..d644e80 --- /dev/null +++ b/arch/arc/include/asm/global_data.h @@ -0,0 +1,19 @@ +/* + * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __ASM_ARC_GLOBAL_DATA_H +#define __ASM_ARC_GLOBAL_DATA_H + +/* Architecture-specific global data */ +struct arch_global_data { + int running_on_hw; +}; + +#include <asm-generic/global_data.h> + +#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r25") + +#endif /* __ASM_ARC_GLOBAL_DATA_H */ diff --git a/arch/arc/include/asm/io.h b/arch/arc/include/asm/io.h new file mode 100644 index 0000000..b7facc1 --- /dev/null +++ b/arch/arc/include/asm/io.h @@ -0,0 +1,287 @@ +/* + * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <linux/types.h> + +#ifndef __ASM_ARC_IO_H +#define __ASM_ARC_IO_H + +#ifdef __KERNEL__ + +#include <linux/types.h> +#include <asm/byteorder.h> + +static inline void sync(void) +{ + /* Not yet implemented */ +} + +#define IO_WRITE32(val, addr) ({__asm__ __volatile__ ("st.di %0,[%1]" : : \ + "r" ((val)) , "r" ((addr))); }) + +#define IO_READ32(addr) ({unsigned int val = 0; __asm__ __volatile__ \ + ("ld.di %0,[%1]" : "=&r" ((val)) : "r" ((addr))); val; }) + +#define IO_WRITE8(val, addr) ({__asm__ __volatile__ ("stb.di %0,[%1]" : : \ + "r" ((val)), "r" ((addr))); }) + +#define IO_READ8(addr) ({unsigned int val = 0; __asm__ __volatile__ \ + ("ldb.di %0,[%1]" : "=&r" ((val)) : "r" ((addr))); val; }) + +#define writeb(val, addr) ({ __asm__ __volatile__ ("stb.di %0,[%1]" : :\ + "r" ((val)), "r" ((addr))); }) + +#define writew(val, addr) ({ __asm__ __volatile__ ("stw.di %0,[%1]" : :\ + "r" ((val)), "r" ((addr))); }) + +#define writel(val, addr) ({ __asm__ __volatile__ ("st.di %0,[%1]" : :\ + "r" ((val)), "r" ((addr))); }) + +#define readb(addr) ({unsigned int val = 0; __asm__ __volatile__ \ + ("ldb.di %0,[%1]" : "=&r" ((val)) : "r" ((addr))); val; }) + +#define readw(addr) ({unsigned int val = 0; __asm__ __volatile__ \ + ("ldw.di %0,[%1]" : "=&r" ((val)) : "r" ((addr))); val; }) + +#define readl(addr) ({unsigned int val = 0; __asm__ __volatile__ \ + ("ld.di %0,[%1]" : "=&r" ((val)) : "r"((addr))); val; }) + +#define __raw_readb readb +#define __raw_readw readw +#define __raw_readl readl + +#define __raw_writeb writeb +#define __raw_writew writew +#define __raw_writel writel + +/* These can't be used, because they don't make any sense like this - PS */ +#define memset_io(a, b, c) memset((void *)(a), (b), (c)) +#define memcpy_fromio(a, b, c) memcpy((a), (void *)(b), (c)) +#define memcpy_toio(a, b, c) memcpy((void *)(a), (b), (c)) + +#define __io(a) (a) +#define __mem_pci(a) ((unsigned long)(a)) +#define __mem_isa(a) ((unsigned long)(a)) + +static inline int __raw_readsb(unsigned int addr, void *data, int bytelen) +{ + __asm__ __volatile__ ("1:ld.di r8,[r0];\n" + "sub.f r2,r2,1;\n" + "bnz.d 1b;\n" + "stb.ab r8,[r1,1];\n" + : + : "r" (addr), "r" (data), "r" (bytelen) + : "r8"); + return bytelen; +} + +static inline int __raw_readsw(unsigned int addr, void *data, int wordlen) +{ + __asm__ __volatile__ ("1:ld.di r8,[r0];\n" + "sub.f r2,r2,1;\n" + "bnz.d 1b;\n" + "stw.ab r8,[r1,2];\n" + : + : "r" (addr), "r" (data), "r" (wordlen) + : "r8"); + return wordlen; +} + +static inline int __raw_readsl(unsigned int addr, void *data, int longlen) +{ + __asm__ __volatile__ ("1:ld.di r8,[r0];\n" + "sub.f r2,r2,1;\n" + "bnz.d 1b;\n" + "st.ab r8,[r1,4];\n" + : + : "r" (addr), "r" (data), "r" (longlen) + : "r8"); + return longlen; +} + +static inline int __raw_writesb(unsigned int addr, void *data, int bytelen) +{ + __asm__ __volatile__ ("1:ldb.ab r8,[r1,1];\n" + "sub.f r2,r2,1;\n" + "bnz.d 1b;\n" + "st.di r8,[r0,0];\n" + : + : "r" (addr), "r" (data), "r" (bytelen) + : "r8"); + return bytelen; +} + +static inline int __raw_writesw(unsigned int addr, void *data, int wordlen) +{ + __asm__ __volatile__ ("1:ldw.ab r8,[r1,2];\n" + "sub.f r2,r2,1;\n" + "bnz.d 1b;\n" + "st.ab.di r8,[r0,0];\n" + : + : "r" (addr), "r" (data), "r" (wordlen) + : "r8"); + return wordlen; +} + +static inline int __raw_writesl(unsigned int addr, void *data, int longlen) +{ + __asm__ __volatile__ ("1:ld.ab r8,[r1,4];\n" + "sub.f r2,r2,1;\n" + "bnz.d 1b;\n" + "st.ab.di r8,[r0,0];\n" + : + : "r" (addr), "r" (data), "r" (longlen) + : "r8"); + return longlen; +} + +/* + * Generic virtual read/write + */ +#define iomem_valid_addr(iomem, sz) (1) +#define iomem_to_phys(iomem) (iomem) + +#ifdef __io +#define outb(v, p) __raw_writeb(v, __io(p)) +#define outw(v, p) __raw_writew(cpu_to_le16(v), __io(p)) +#define outl(v, p) __raw_writel(cpu_to_le32(v), __io(p)) + +#define inb(p) ({ unsigned int __v = __raw_readb(__io(p)); __v; }) +#define inw(p) ({ unsigned int __v = le16_to_cpu(__raw_readw(__io(p))); __v; }) +#define inl(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(__io(p))); __v; }) + +#define outsb(p, d, l) __raw_writesb(__io(p), d, l) +#define outsw(p, d, l) __raw_writesw(__io(p), d, l) +#define outsl(p, d, l) __raw_writesl(__io(p), d, l) + +#define insb(p, d, l) __raw_readsb(__io(p), d, l) +#define insw(p, d, l) __raw_readsw(__io(p), d, l) +#define insl(p, d, l) __raw_readsl(__io(p), d, l) +#endif + +#define outb_p(val, port) outb((val), (port)) +#define outw_p(val, port) outw((val), (port)) +#define outl_p(val, port) outl((val), (port)) + +#define inb_p(port) inb((port)) +#define inw_p(port) inw((port)) +#define inl_p(port) inl((port)) + +#define outsb_p(port, from, len) outsb(port, from, len) +#define outsw_p(port, from, len) outsw(port, from, len) +#define outsl_p(port, from, len) outsl(port, from, len) + +#define insb_p(port, to, len) insb(port, to, len) +#define insw_p(port, to, len) insw(port, to, len) +#define insl_p(port, to, len) insl(port, to, len) + +/* + * Clear and set bits in one shot. These macros can be used to clear and + * set multiple bits in a register using a single call. These macros can + * also be used to set a multiple-bit bit pattern using a mask, by + * specifying the mask in the 'clear' parameter and the new bit pattern + * in the 'set' parameter. + */ + +#define out_arch(type, endian, a, v) __raw_write##type(cpu_to_##endian(v), a) +#define in_arch(type, endian, a) endian##_to_cpu(__raw_read##type(a)) + +#define out_le32(a, v) out_arch(l, le32, a, v) +#define out_le16(a, v) out_arch(w, le16, a, v) + +#define in_le32(a) in_arch(l, le32, a) +#define in_le16(a) in_arch(w, le16, a) + +#define out_be32(a, v) out_arch(l, be32, a, v) +#define out_be16(a, v) out_arch(w, be16, a, v) + +#define in_be32(a) in_arch(l, be32, a) +#define in_be16(a) in_arch(w, be16, a) + +#define out_8(a, v) __raw_writeb(v, a) +#define in_8(a) __raw_readb(a) + +#define clrbits(type, addr, clear) \ + out_##type((addr), in_##type(addr) & ~(clear)) + +#define setbits(type, addr, set) \ + out_##type((addr), in_##type(addr) | (set)) + +#define clrsetbits(type, addr, clear, set) \ + out_##type((addr), (in_##type(addr) & ~(clear)) | (set)) + +#define clrbits_be32(addr, clear) clrbits(be32, addr, clear) +#define setbits_be32(addr, set) setbits(be32, addr, set) +#define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set) + +#define clrbits_le32(addr, clear) clrbits(le32, addr, clear) +#define setbits_le32(addr, set) setbits(le32, addr, set) +#define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set) + +#define clrbits_be16(addr, clear) clrbits(be16, addr, clear) +#define setbits_be16(addr, set) setbits(be16, addr, set) +#define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set) + +#define clrbits_le16(addr, clear) clrbits(le16, addr, clear) +#define setbits_le16(addr, set) setbits(le16, addr, set) +#define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set) + +#define clrbits_8(addr, clear) clrbits(8, addr, clear) +#define setbits_8(addr, set) setbits(8, addr, set) +#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set) + +/* + * Given a physical address and a length, return a virtual address + * that can be used to access the memory range with the caching + * properties specified by "flags". + */ +#define MAP_NOCACHE (0) +#define MAP_WRCOMBINE (0) +#define MAP_WRBACK (0) +#define MAP_WRTHROUGH (0) + +static inline void * +map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags) +{ + return (void *)paddr; +} + +/* + * Take down a mapping set up by map_physmem(). + */ +static inline void unmap_physmem(void *vaddr, unsigned long flags) +{ +} + +extern void *__ioremap(unsigned long physaddr, unsigned long size, + int cacheflag); +extern void *ioremap(unsigned long physaddr, unsigned long size); +extern void *ioremap_nocache(unsigned long physaddr, unsigned long size); +extern void __iounmap(void *addr, unsigned long size); +extern void iounmap(void *addr); + +/* + * IO bus memory addresses are also 1:1 with the physical address + */ +#define virt_to_bus virt_to_phys +#define bus_to_virt phys_to_virt + + +/* Written to pacify arch indepeandant code. + * Not used by ARC I/O + */ +#define _inb inb +#define _outb outb + +#define IO_SPACE_LIMIT 0xffff + +#define IOMAP_FULL_CACHING 0 +#define IOMAP_NOCACHE_SER 1 +#define IOMAP_NOCACHE_NONSER 2 +#define IOMAP_WRITETHROUGH 3 + +#endif /* __KERNEL__ */ +#endif /* __ASM_ARC_IO_H */ diff --git a/arch/arc/include/asm/linkage.h b/arch/arc/include/asm/linkage.h new file mode 100644 index 0000000..0283e9e --- /dev/null +++ b/arch/arc/include/asm/linkage.h @@ -0,0 +1,63 @@ +/* + * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_LINKAGE_H +#define __ASM_LINKAGE_H + +#ifdef __ASSEMBLY__ + +/* Can't use the ENTRY macro in linux/linkage.h + * gas considers ';' as comment vs. newline + */ +.macro ARC_ENTRY name + .global \name + .align 4 + \name: +.endm + +.macro ARC_EXIT name +#define ASM_PREV_SYM_ADDR(name) .-##name + .size \ name, ASM_PREV_SYM_ADDR(\name) +.endm + +/* annotation for data we want in DCCM - if enabled in .config */ +.macro ARCFP_DATA nm +#ifdef CONFIG_ARC_HAS_DCCM + .section .data.arcfp +#else + .section .data +#endif + .global \nm +.endm + +/* annotation for data we want in DCCM - if enabled in .config */ +.macro ARCFP_CODE +#ifdef CONFIG_ARC_HAS_ICCM + .section .text.arcfp, "ax",@progbits +#else + .section .text, "ax",@progbits +#endif +.endm + +#else /* !__ASSEMBLY__ */ + +#ifdef CONFIG_ARC_HAS_ICCM +#define __arcfp_code __attribute__((__section__(".text.arcfp"))) +#else +#define __arcfp_code __attribute__((__section__(".text"))) +#endif + +#ifdef CONFIG_ARC_HAS_DCCM +#define __arcfp_data __attribute__((__section__(".data.arcfp"))) +#else +#define __arcfp_data __attribute__((__section__(".data"))) +#endif + +#endif /* __ASSEMBLY__ */ + +#endif diff --git a/arch/arc/include/asm/posix_types.h b/arch/arc/include/asm/posix_types.h new file mode 100644 index 0000000..9c5667b --- /dev/null +++ b/arch/arc/include/asm/posix_types.h @@ -0,0 +1,73 @@ +/* + * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __ASM_ARC_POSIX_TYPES_H +#define __ASM_ARC_POSIX_TYPES_H + +/* + * This file is generally used by user-level software, so you need to + * be a little careful about namespace pollution etc. Also, we cannot + * assume GCC is being used. + */ + +typedef unsigned short __kernel_dev_t; +typedef unsigned long __kernel_ino_t; +typedef unsigned short __kernel_mode_t; +typedef unsigned short __kernel_nlink_t; +typedef long __kernel_off_t; +typedef int __kernel_pid_t; +typedef unsigned short __kernel_ipc_pid_t; +typedef unsigned short __kernel_uid_t; +typedef unsigned short __kernel_gid_t; +typedef unsigned int __kernel_size_t; +typedef int __kernel_ssize_t; +typedef int __kernel_ptrdiff_t; +typedef long __kernel_time_t; +typedef long __kernel_suseconds_t; +typedef long __kernel_clock_t; +typedef int __kernel_daddr_t; +typedef char * __kernel_caddr_t; +typedef unsigned short __kernel_uid16_t; +typedef unsigned short __kernel_gid16_t; +typedef unsigned int __kernel_uid32_t; +typedef unsigned int __kernel_gid32_t; + +typedef unsigned short __kernel_old_uid_t; +typedef unsigned short __kernel_old_gid_t; + +#ifdef __GNUC__ +typedef long long __kernel_loff_t; +#endif + +typedef struct { +#if defined(__KERNEL__) || defined(__USE_ALL) + int val[2]; +#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */ + int __val[2]; +#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */ +} __kernel_fsid_t; + +#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) + +#undef __FD_SET +#define __FD_SET(fd, fdsetp) \ + (((fd_set *)fdsetp)->fds_bits[fd >> 5] |= (1<<(fd & 31))) + +#undef __FD_CLR +#define __FD_CLR(fd, fdsetp) \ + (((fd_set *)fdsetp)->fds_bits[fd >> 5] &= ~(1<<(fd & 31))) + +#undef __FD_ISSET +#define __FD_ISSET(fd, fdsetp) \ + ((((fd_set *)fdsetp)->fds_bits[fd >> 5] & (1<<(fd & 31))) != 0) + +#undef __FD_ZERO +#define __FD_ZERO(fdsetp) \ + (memset (fdsetp, 0, sizeof (*(fd_set *)fdsetp))) + +#endif + +#endif /* __ASM_ARC_POSIX_TYPES_H */ diff --git a/arch/arc/include/asm/ptrace.h b/arch/arc/include/asm/ptrace.h new file mode 100644 index 0000000..3b2df87 --- /dev/null +++ b/arch/arc/include/asm/ptrace.h @@ -0,0 +1,101 @@ +/* + * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. All rights reserved. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __ASM_ARC_PTRACE_H +#define __ASM_ARC_PTRACE_H + +#ifndef __ASSEMBLY__ + +/* THE pt_regs: Defines how regs are saved during entry into kernel */ + +struct pt_regs { + /* Real registers */ + long bta; /* bta_l1, bta_l2, erbta */ + + long lp_start, lp_end, lp_count; + + long status32; /* status32_l1, status32_l2, erstatus */ + long ret; /* ilink1, ilink2 or eret */ + long blink; + long fp; + long r26; /* gp */ + + long r12, r11, r10, r9, r8, r7, r6, r5, r4, r3, r2, r1, r0; + + long sp; /* user/kernel sp depending on where we came from */ + long orig_r0; + + /* + * To distinguish bet excp, syscall, irq + * For traps and exceptions, Exception Cause Register. + * ECR: <00> <VV> <CC> <PP> + * Last word used by Linux for extra state mgmt (syscall-restart) + * For interrupts, use artificial ECR values to note current prio-level + */ + union { + struct { +#ifdef CONFIG_CPU_BIG_ENDIAN + unsigned long state:8, ecr_vec:8, + ecr_cause:8, ecr_param:8; +#else + unsigned long ecr_param:8, ecr_cause:8, + ecr_vec:8, state:8; +#endif + }; + unsigned long event; + }; + + long user_r25; +}; + +/* Callee saved registers - need to be saved only when you are scheduled out */ + +struct callee_regs { + long r25, r24, r23, r22, r21, r20, r19, r18, r17, r16, r15, r14, r13; +}; + +#define instruction_pointer(regs) ((regs)->ret) +#define profile_pc(regs) instruction_pointer(regs) + +/* return 1 if user mode or 0 if kernel mode */ +#define user_mode(regs) (regs->status32 & STATUS_U_MASK) + +#define user_stack_pointer(regs)\ +({ unsigned int sp; \ + if (user_mode(regs)) \ + sp = (regs)->sp;\ + else \ + sp = -1; \ + sp; \ +}) + +/* return 1 if PC in delay slot */ +#define delay_mode(regs) ((regs->status32 & STATUS_DE_MASK) == STATUS_DE_MASK) + +#define in_syscall(regs) ((regs->ecr_vec == ECR_V_TRAP) && !regs->ecr_param) +#define in_brkpt_trap(regs) ((regs->ecr_vec == ECR_V_TRAP) && regs->ecr_param) + +#define STATE_SCALL_RESTARTED 0x01 + +#define syscall_wont_restart(reg) (reg->state |= STATE_SCALL_RESTARTED) +#define syscall_restartable(reg) !(reg->state & STATE_SCALL_RESTARTED) + +#define current_pt_regs() \ +({ \ + /* open-coded current_thread_info() */ \ + register unsigned long sp asm ("sp"); \ + unsigned long pg_start = (sp & ~(THREAD_SIZE - 1)); \ + (struct pt_regs *)(pg_start + THREAD_SIZE) - 1; \ +}) + +static inline long regs_return_value(struct pt_regs *regs) +{ + return regs->r0; +} + +#endif /* !__ASSEMBLY__ */ + +#endif /* __ASM_ARC_PTRACE_H */ diff --git a/arch/arc/include/asm/sections.h b/arch/arc/include/asm/sections.h new file mode 100644 index 0000000..2b8c516 --- /dev/null +++ b/arch/arc/include/asm/sections.h @@ -0,0 +1 @@ +#include <asm-generic/sections.h> diff --git a/arch/arc/include/asm/string.h b/arch/arc/include/asm/string.h new file mode 100644 index 0000000..909129c --- /dev/null +++ b/arch/arc/include/asm/string.h @@ -0,0 +1,27 @@ +/* + * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. All rights reserved. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __ASM_ARC_STRING_H +#define __ASM_ARC_STRING_H + +#define __HAVE_ARCH_MEMSET +#define __HAVE_ARCH_MEMCPY +#define __HAVE_ARCH_MEMCMP +#define __HAVE_ARCH_STRCHR +#define __HAVE_ARCH_STRCPY +#define __HAVE_ARCH_STRCMP +#define __HAVE_ARCH_STRLEN + +extern void *memset(void *ptr, int, __kernel_size_t); +extern void *memcpy(void *, const void *, __kernel_size_t); +extern void memzero(void *ptr, __kernel_size_t n); +extern int memcmp(const void *, const void *, __kernel_size_t); +extern char *strchr(const char *s, int c); +extern char *strcpy(char *dest, const char *src); +extern int strcmp(const char *cs, const char *ct); +extern __kernel_size_t strlen(const char *); + +#endif /* __ASM_ARC_STRING_H */ diff --git a/arch/arc/include/asm/types.h b/arch/arc/include/asm/types.h new file mode 100644 index 0000000..7475db1 --- /dev/null +++ b/arch/arc/include/asm/types.h @@ -0,0 +1,55 @@ +/* + * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __ASM_ARC_TYPES_H +#define __ASM_ARC_TYPES_H + +typedef unsigned short umode_t; + +/* + * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the + * header files exported to user space + */ + +typedef __signed__ char __s8; +typedef unsigned char __u8; + +typedef __signed__ short __s16; +typedef unsigned short __u16; + +typedef __signed__ int __s32; +typedef unsigned int __u32; + +#if defined(__GNUC__) && !defined(__STRICT_ANSI__) +typedef __signed__ long long __s64; +typedef unsigned long long __u64; +#endif + +/* + * These aren't exported outside the kernel to avoid name space clashes + */ +typedef signed char s8; +typedef unsigned char u8; + +typedef signed short s16; +typedef unsigned short u16; + +typedef signed int s32; +typedef unsigned int u32; + +typedef signed long long s64; +typedef unsigned long long u64; + +#define BITS_PER_LONG 32 + +/* Dma addresses are 32-bits wide. */ + +typedef u32 dma_addr_t; + +typedef unsigned long phys_addr_t; +typedef unsigned long phys_size_t; + +#endif /* __ASM_ARC_TYPES_H */ diff --git a/arch/arc/include/asm/u-boot.h b/arch/arc/include/asm/u-boot.h new file mode 100644 index 0000000..e354edf --- /dev/null +++ b/arch/arc/include/asm/u-boot.h @@ -0,0 +1,15 @@ +/* + * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __ASM_ARC_U_BOOT_H__ +#define __ASM_ARC_U_BOOT_H__ + +#include <asm-generic/u-boot.h> + +/* For image.h:image_check_target_arch() */ +#define IH_ARCH_DEFAULT IH_ARCH_ARC + +#endif /* __ASM_ARC_U_BOOT_H__ */ diff --git a/arch/arc/include/asm/unaligned.h b/arch/arc/include/asm/unaligned.h new file mode 100644 index 0000000..6cecbbb --- /dev/null +++ b/arch/arc/include/asm/unaligned.h @@ -0,0 +1 @@ +#include <asm-generic/unaligned.h>
These are header files used by ARC700 architecture. Following files were borrowed from Linux kernel sources, commit 5ee54f38171b9b3541c5e9cf9c3a9e53455fd8b4 (Linux 3.11.10): * arcregs.h * linkage.h * ptrace.h * string.h Also note that "arch-arc700/hardware.h" is only required for compilation of "designware_i2c" driver which refers to "asm/arch/hardware.h". It would be good to fix mentioned driver sometime soon but it will cause changes in ARM board configs that use "designware_i2c". Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Mischa Jonker <mjonker@synopsys.com> Cc: Francois Bedard <fbedard@synopsys.com> Changes for v2: * Deleted unused empty file "asm/processor.h" * Added commit message * Added explicit mention of header files borrowed from Linux sources with reference to versoin/commit in Linux git repository --- arch/arc/include/asm/arch-arc700/hardware.h | 0 arch/arc/include/asm/arcregs.h | 324 ++++++++++++++++++++++++++++ arch/arc/include/asm/bitops.h | 19 ++ arch/arc/include/asm/byteorder.h | 23 ++ arch/arc/include/asm/cache.h | 23 ++ arch/arc/include/asm/config.h | 12 ++ arch/arc/include/asm/errno.h | 1 + arch/arc/include/asm/global_data.h | 19 ++ arch/arc/include/asm/io.h | 287 ++++++++++++++++++++++++ arch/arc/include/asm/linkage.h | 63 ++++++ arch/arc/include/asm/posix_types.h | 73 +++++++ arch/arc/include/asm/ptrace.h | 101 +++++++++ arch/arc/include/asm/sections.h | 1 + arch/arc/include/asm/string.h | 27 +++ arch/arc/include/asm/types.h | 55 +++++ arch/arc/include/asm/u-boot.h | 15 ++ arch/arc/include/asm/unaligned.h | 1 + 17 files changed, 1044 insertions(+) create mode 100644 arch/arc/include/asm/arch-arc700/hardware.h create mode 100644 arch/arc/include/asm/arcregs.h create mode 100644 arch/arc/include/asm/bitops.h create mode 100644 arch/arc/include/asm/byteorder.h create mode 100644 arch/arc/include/asm/cache.h create mode 100644 arch/arc/include/asm/config.h create mode 100644 arch/arc/include/asm/errno.h create mode 100644 arch/arc/include/asm/global_data.h create mode 100644 arch/arc/include/asm/io.h create mode 100644 arch/arc/include/asm/linkage.h create mode 100644 arch/arc/include/asm/posix_types.h create mode 100644 arch/arc/include/asm/ptrace.h create mode 100644 arch/arc/include/asm/sections.h create mode 100644 arch/arc/include/asm/string.h create mode 100644 arch/arc/include/asm/types.h create mode 100644 arch/arc/include/asm/u-boot.h create mode 100644 arch/arc/include/asm/unaligned.h