| Message ID | 1386415158-8695-10-git-send-email-marc.zyngier@arm.com |
|---|---|
| State | Not Applicable |
| Delegated to: | Albert ARIBAUD |
| Headers | show |
diff --git a/arch/arm/cpu/armv7/nonsec_virt.S b/arch/arm/cpu/armv7/nonsec_virt.S index 35f5463..6130a37 100644 --- a/arch/arm/cpu/armv7/nonsec_virt.S +++ b/arch/arm/cpu/armv7/nonsec_virt.S @@ -45,6 +45,12 @@ _monitor_vectors: * ip: target PC */ _secure_monitor: +#ifdef CONFIG_ARMV7_PSCI + ldr r5, =_psci_vectors @ Switch to the next monitor + mcr p15, 0, r5, c12, c0, 1 + isb +#endif + mrc p15, 0, r5, c1, c1, 0 @ read SCR bic r5, r5, #0x4e @ clear IRQ, FIQ, EA, nET bits orr r5, r5, #0x31 @ enable NS, AW, FW bits
Allow the switch to a second stage secure monitor just before switching to non-secure. This allows a resident piece of firmware to be active once the kernel has been entered (the u-boot monitor is dead anyway, its pages being reused). Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> --- arch/arm/cpu/armv7/nonsec_virt.S | 6 ++++++ 1 file changed, 6 insertions(+)