Message ID | 1363018093-28979-13-git-send-email-sjg@chromium.org |
---|---|
State | Accepted, archived |
Delegated to: | Tom Rini |
Headers | show |
diff --git a/board/chromebook-x86/dts/link.dts b/board/chromebook-x86/dts/link.dts index ae8217d..d0738cb 100644 --- a/board/chromebook-x86/dts/link.dts +++ b/board/chromebook-x86/dts/link.dts @@ -21,4 +21,15 @@ chosen { }; memory { device_type = "memory"; reg = <0 0>; }; + + spi { + #address-cells = <1>; + #size-cells = <0>; + compatible = "intel,ich9"; + spi-flash@0 { + reg = <0>; + compatible = "winbond,w25q64", "spi-flash"; + memory-map = <0xff800000 0x00800000>; + }; + }; };
Add a memory-mapped 8GB SPI chip. Signed-off-by: Simon Glass <sjg@chromium.org> --- Changes in v2: None board/chromebook-x86/dts/link.dts | 11 +++++++++++ 1 file changed, 11 insertions(+)