mbox series

[0/2] rockchip: Fix ethernet on Radxa ROCK Pi E v1.21

Message ID 20240118071949.927089-1-jonas@kwiboo.se
Headers show
Series rockchip: Fix ethernet on Radxa ROCK Pi E v1.21 | expand

Message

Jonas Karlman Jan. 18, 2024, 7:19 a.m. UTC 
Ethernet on a Radxa ROCK Pi E v1.21 with a RTL8211F ethernet PHY
currently fails with the following message:

  Could not get PHY for ethernet@ff540000: addr -1

This happens because the ethernet PHY is never reset before a phy-id is
read back from the MDIO bus.

This series fixes this issue by calling eth_phy_set_mdio_bus() from the
designware ethernet driver to issue a PHY reset before the phy_connect()
call.

With the driver change and DM_ETH_PHY and PHY_REALTEK enabled the PHY
can be identified and etherent works:

  => mdio list
  ethernet@ff540000:
  1 - RealTek RTL8211F <--> ethernet@ff540000

This was tested with and without the DM_MDIO option enabled. Decided to
leave it disabled in this series.

Jonas Karlman (2):
  net: designware: Reset eth phy before phy connect
  rockchip: rk3328-rock-pi-e: Enable DM_ETH_PHY and PHY_REALTEK

 configs/rock-pi-e-rk3328_defconfig | 2 ++
 drivers/net/designware.c           | 7 +++++++
 2 files changed, 9 insertions(+)

Comments

Trevor Woerner Jan. 18, 2024, 9 p.m. UTC | #1 
Hi Jonas,

On Thu 2024-01-18 @ 07:19:44 AM, Jonas Karlman wrote:
> Ethernet on a Radxa ROCK Pi E v1.21 with a RTL8211F ethernet PHY
> currently fails with the following message:
> 
>   Could not get PHY for ethernet@ff540000: addr -1
> 
> This happens because the ethernet PHY is never reset before a phy-id is
> read back from the MDIO bus.
> 
> This series fixes this issue by calling eth_phy_set_mdio_bus() from the
> designware ethernet driver to issue a PHY reset before the phy_connect()
> call.
> 
> With the driver change and DM_ETH_PHY and PHY_REALTEK enabled the PHY
> can be identified and etherent works:
> 
>   => mdio list
>   ethernet@ff540000:
>   1 - RealTek RTL8211F <--> ethernet@ff540000
> 
> This was tested with and without the DM_MDIO option enabled. Decided to
> leave it disabled in this series.

This works great, thank you! As you suspected, both boards/PHYs work fine now
work under Linux (in addition to U-Boot).

Tested-By: Trevor Woerner <twoerner@gmail.com>

> Jonas Karlman (2):
>   net: designware: Reset eth phy before phy connect
>   rockchip: rk3328-rock-pi-e: Enable DM_ETH_PHY and PHY_REALTEK
> 
>  configs/rock-pi-e-rk3328_defconfig | 2 ++
>  drivers/net/designware.c           | 7 +++++++
>  2 files changed, 9 insertions(+)
> 
> -- 
> 2.43.0
>