diff mbox series

[02/12] cpu: use dt accessor device tree access

Message ID 20190929074651.8787-3-npiggin@gmail.com
State Superseded
Headers show
Series little endian skiboot | expand

Checks

Context Check Description
snowpatch_ozlabs/apply_patch success Successfully applied on branch master (470ffb5f29d741c3bed600f7bb7bf0cbb270e05a)
snowpatch_ozlabs/snowpatch_job_snowpatch-skiboot fail Test snowpatch/job/snowpatch-skiboot on branch master
snowpatch_ozlabs/snowpatch_job_snowpatch-skiboot-dco success Signed-off-by present

Commit Message

Nicholas Piggin Sept. 29, 2019, 7:46 a.m. UTC
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
 core/cpu.c            |  2 +-
 core/device.c         |  1 +
 core/fdt.c            |  4 ++--
 core/interrupts.c     |  4 ++--
 core/pci.c            | 28 +++++++++++++---------------
 hdata/fsp.c           |  7 ++++---
 hdata/iohub.c         | 20 ++++++++++----------
 hdata/paca.c          | 10 +++++-----
 hw/fsp/fsp-sysparam.c |  4 ++--
 hw/imc.c              |  4 ++--
 hw/lpc.c              |  6 +++---
 hw/psi.c              |  8 ++++----
 hw/vas.c              |  7 ++++---
 13 files changed, 53 insertions(+), 52 deletions(-)

Comments

Oliver O'Halloran Oct. 1, 2019, 3:03 a.m. UTC | #1
On Sun, 2019-09-29 at 17:46 +1000, Nicholas Piggin wrote:
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> ---
>  core/cpu.c            |  2 +-
>  core/device.c         |  1 +
>  core/fdt.c            |  4 ++--
>  core/interrupts.c     |  4 ++--
>  core/pci.c            | 28 +++++++++++++---------------
>  hdata/fsp.c           |  7 ++++---
>  hdata/iohub.c         | 20 ++++++++++----------
>  hdata/paca.c          | 10 +++++-----
>  hw/fsp/fsp-sysparam.c |  4 ++--
>  hw/imc.c              |  4 ++--
>  hw/lpc.c              |  6 +++---
>  hw/psi.c              |  8 ++++----
>  hw/vas.c              |  7 ++++---
>  13 files changed, 53 insertions(+), 52 deletions(-)
> 
> diff --git a/core/pci.c b/core/pci.c
> index 9ee70f4fd..6c5c83bea 100644
> --- a/core/pci.c
> +++ b/core/pci.c
> @@ -1549,16 +1547,16 @@ static void __noinline pci_add_one_device_node(struct phb *phb,
>  	char name[MAX_NAME];
>  	char compat[MAX_NAME];
>  	uint32_t rev_class, vdid;
> -	uint32_t reg[5];
> +	__be32 reg[5];
>  	uint8_t intpin;
>  	bool is_pcie;
> -	const uint32_t ranges_direct[] = {
> +	const __be32 ranges_direct[] = {
>  				/* 64-bit direct mapping. We know the bridges
>  				 * don't cover the entire address space so
>  				 * use 0xf00... as a good compromise. */
> -				0x02000000, 0x0, 0x0,
> -				0x02000000, 0x0, 0x0,
> -				0xf0000000, 0x0};
> +				cpu_to_be32(0x02000000), 0x0, 0x0,
> +				cpu_to_be32(0x02000000), 0x0, 0x0,
> +				cpu_to_be32(0xf0000000), 0x0};
>  
>  	pci_cfg_read32(phb, pd->bdfn, 0, &vdid);
>  	pci_cfg_read32(phb, pd->bdfn, PCI_CFG_REV_ID, &rev_class);
> @@ -1635,7 +1633,7 @@ static void __noinline pci_add_one_device_node(struct phb *phb,
>  	 * entry in the "reg" property. That's enough for Linux and we might
>  	 * even want to make this legit in future ePAPR
>  	 */
> -	reg[0] = pd->bdfn << 8;
> +	reg[0] = cpu_to_be32(pd->bdfn << 8);
>  	reg[1] = reg[2] = reg[3] = reg[4] = 0;
>  	dt_add_property(np, "reg", reg, sizeof(reg));

I think we can use dt_add_property_cells() here instead of constructing
reg manually.

> diff --git a/hdata/iohub.c b/hdata/iohub.c
> index 6921d95ce..2af040a2f 100644
> --- a/hdata/iohub.c
> +++ b/hdata/iohub.c
> @@ -109,12 +109,12 @@ static struct dt_node *io_add_phb3(const struct cechub_io_hub *hub,
>  	/* "reg" property contains in order the PE, PCI and SPCI XSCOM
>  	 * addresses
>  	 */
> -	reg[0] = pe_xscom;
> -	reg[1] = 0x20;
> -	reg[2] = pci_xscom;
> -	reg[3] = 0x05;
> -	reg[4] = spci_xscom;
> -	reg[5] = 0x15;
> +	reg[0] = cpu_to_be32(pe_xscom);
> +	reg[1] = cpu_to_be32(0x20);
> +	reg[2] = cpu_to_be32(pci_xscom);
> +	reg[3] = cpu_to_be32(0x05);
> +	reg[4] = cpu_to_be32(spci_xscom);
> +	reg[5] = cpu_to_be32(0x15);
>  	dt_add_property(pbcq, "reg", reg, sizeof(reg));

Same here.

>  
>  	/* A couple more things ... */
> @@ -214,10 +214,10 @@ static struct dt_node *io_add_phb4(const struct cechub_io_hub *hub,
>  		return NULL;
>  
>  	/* "reg" property contains (in order) the PE and PCI XSCOM addresses */
> -	reg[0] = pe_xscom;
> -	reg[1] = 0x100;
> -	reg[2] = pci_xscom;
> -	reg[3] = 0x200;
> +	reg[0] = cpu_to_be32(pe_xscom);
> +	reg[1] = cpu_to_be32(0x100);
> +	reg[2] = cpu_to_be32(pci_xscom);
> +	reg[3] = cpu_to_be32(0x200);
>  	dt_add_property(pbcq, "reg", reg, sizeof(reg));

And here.

> diff --git a/hdata/paca.c b/hdata/paca.c
> index 28025b0cd..6ebb75320 100644
> --- a/hdata/paca.c
> +++ b/hdata/paca.c
> @@ -174,8 +174,8 @@ static void add_xics_icps(void)
>  					"IBM,ppc-xicp",
>  					"IBM,power7-xicp");
>  
> -		irange[0] = dt_property_get_cell(intsrv, 0); /* Index */
> -		irange[1] = num_threads;		     /* num servers */
> +		irange[0] = cpu_to_be32(dt_property_get_cell(intsrv, 0)); /* Index */
> +		irange[1] = cpu_to_be32(num_threads);		     /* num servers */
>  		dt_add_property(icp, "ibm,interrupt-server-ranges",
>  				irange, sizeof(irange));
>  		dt_add_property(icp, "interrupt-controller", NULL, 0);
> @@ -183,10 +183,10 @@ static void add_xics_icps(void)
>  		dt_add_property_string(icp, "device_type",
>  				   "PowerPC-External-Interrupt-Presentation");
>  		for (i = 0; i < num_threads*2; i += 2) {
> -			reg[i] = ibase;
> +			reg[i] = cpu_to_be64(ibase);
>  			/* One page is enough for a handful of regs. */
> -			reg[i+1] = 4096;
> -			ibase += reg[i+1];
> +			reg[i+1] = cpu_to_be64(4096);
> +			ibase += be64_to_cpu(reg[i+1]);
>  		}
>  		dt_add_property(icp, "reg", reg, sizeof(reg));	
>  	}

Looks like this code is used as a fallback if we can't find the XICS
address ranges in the PACA. However, it's also got:

        num_threads = intsrv->len / sizeof(u32);
        assert(num_threads <= PACA_MAX_THREADS);

        icp = dt_new_addr(dt_root, "interrupt-controller", ibase);
        if (!icp)
                continue;

        dt_add_property_strings(icp, "compatible",
                                "IBM,ppc-xicp",
                                "IBM,power7-xicp");

and:
		#define PACA_MAX_THREADS 4

So I'm guessing this is all dead P7 code that we can delete.

> diff --git a/hw/vas.c b/hw/vas.c
> index 212da0ec1..3c5ebc920 100644
> --- a/hw/vas.c
> +++ b/hw/vas.c
> @@ -375,7 +375,7 @@ static struct vas *alloc_vas(uint32_t chip_id, uint32_t vas_id, uint64_t base)
>  
>  static void create_mm_dt_node(struct proc_chip *chip)
>  {
> -	int gcid;
> +	uint32_t gcid, vas_id;
>  	struct dt_node *dn;
>  	struct vas *vas;
>  	uint64_t hvwc_start, hvwc_len;
> @@ -384,7 +384,8 @@ static void create_mm_dt_node(struct proc_chip *chip)
>  	uint64_t pbf_start, pbf_nbits;
>  
>  	vas = chip->vas;
> -	gcid = chip->id;
> +	vas_id = cpu_to_be32(vas->vas_id);
> +	gcid = cpu_to_be32(chip->id);
>  	get_hvwc_mmio_bar(chip->id, &hvwc_start, &hvwc_len);
>  	get_uwc_mmio_bar(chip->id, &uwc_start, &uwc_len);
>  	get_paste_bar(chip->id, &pbar_start, &pbar_len);
> @@ -400,7 +401,7 @@ static void create_mm_dt_node(struct proc_chip *chip)
>  					pbar_start, pbar_len,
>  					pbf_start, pbf_nbits);
>  
> -	dt_add_property(dn, "ibm,vas-id", &vas->vas_id, sizeof(vas->vas_id));
> +	dt_add_property(dn, "ibm,vas-id", &vas_id, sizeof(vas_id));
>  	dt_add_property(dn, "ibm,chip-id", &gcid, sizeof(gcid));
>  }

Urgh, why is it use dt_add_property() directly... Might as well convert
these to use dt_add_property_cells() too

Other hunks looked fine.
Nicholas Piggin Oct. 2, 2019, 3:25 a.m. UTC | #2
Oliver O'Halloran's on October 1, 2019 1:03 pm:
> On Sun, 2019-09-29 at 17:46 +1000, Nicholas Piggin wrote:
>> @@ -183,10 +183,10 @@ static void add_xics_icps(void)
>>  		dt_add_property_string(icp, "device_type",
>>  				   "PowerPC-External-Interrupt-Presentation");
>>  		for (i = 0; i < num_threads*2; i += 2) {
>> -			reg[i] = ibase;
>> +			reg[i] = cpu_to_be64(ibase);
>>  			/* One page is enough for a handful of regs. */
>> -			reg[i+1] = 4096;
>> -			ibase += reg[i+1];
>> +			reg[i+1] = cpu_to_be64(4096);
>> +			ibase += be64_to_cpu(reg[i+1]);
>>  		}
>>  		dt_add_property(icp, "reg", reg, sizeof(reg));	
>>  	}
> 
> Looks like this code is used as a fallback if we can't find the XICS
> address ranges in the PACA. However, it's also got:
> 
>         num_threads = intsrv->len / sizeof(u32);
>         assert(num_threads <= PACA_MAX_THREADS);
> 
>         icp = dt_new_addr(dt_root, "interrupt-controller", ibase);
>         if (!icp)
>                 continue;
> 
>         dt_add_property_strings(icp, "compatible",
>                                 "IBM,ppc-xicp",
>                                 "IBM,power7-xicp");
> 
> and:
> 		#define PACA_MAX_THREADS 4
> 
> So I'm guessing this is all dead P7 code that we can delete.

It does get called for power8 as well though, is it adding something
which is compatible with both? I'll try to do the very minimal endian
changes in this series. Removing dead code or changing to different
dt_ APIs I would prefer to do separately although they are all good
cleanups.

Thanks,
Nick
diff mbox series

Patch

diff --git a/core/cpu.c b/core/cpu.c
index d0e4cdc1c..b3433aef5 100644
--- a/core/cpu.c
+++ b/core/cpu.c
@@ -1214,7 +1214,7 @@  void init_all_cpus(void)
 			t = &cpu_stacks[pir + thread].cpu;
 			init_cpu_thread(t, state, pir + thread);
 			t->trace = boot_cpu->trace;
-			t->server_no = ((const u32 *)p->prop)[thread];
+			t->server_no = dt_property_get_cell(p, thread);
 			t->is_secondary = true;
 			t->primary = pt;
 			t->node = cpu;
diff --git a/core/device.c b/core/device.c
index ce0171b67..0118d485f 100644
--- a/core/device.c
+++ b/core/device.c
@@ -1110,6 +1110,7 @@  void dt_adjust_subtree_phandle(struct dt_node *dev,
 				continue;
 			phandle = dt_prop_get_u32(node, *name);
 			phandle += import_phandle;
+			phandle = cpu_to_be32(phandle);
 			memcpy((char *)&prop->prop, &phandle, prop->len);
 		}
        }
diff --git a/core/fdt.c b/core/fdt.c
index d3c6d9fa1..e093e8b54 100644
--- a/core/fdt.c
+++ b/core/fdt.c
@@ -146,8 +146,8 @@  static void create_dtb_reservemap(void *fdt, const struct dt_node *root)
 		ranges = (const void *)prop->prop;
 
 		for (i = 0; i < prop->len / (sizeof(uint64_t) * 2); i++) {
-			base = *(ranges++);
-			size = *(ranges++);
+			base = be64_to_cpu(*(ranges++));
+			size = be64_to_cpu(*(ranges++));
 			save_err(fdt_add_reservemap_entry(fdt, base, size));
 		}
 	}
diff --git a/core/interrupts.c b/core/interrupts.c
index b0c1da198..10baa15f6 100644
--- a/core/interrupts.c
+++ b/core/interrupts.c
@@ -231,8 +231,8 @@  void add_opal_interrupts(void)
 				names[tns++] = 0;
 			i = count++;
 			irqs = realloc(irqs, 8 * count);
-			irqs[i*2] = isn;
-			irqs[i*2+1] = iflags;
+			irqs[i*2] = cpu_to_be32(isn);
+			irqs[i*2+1] = cpu_to_be32(iflags);
 		}
 	}
 	unlock(&irq_lock);
diff --git a/core/pci.c b/core/pci.c
index 9ee70f4fd..6c5c83bea 100644
--- a/core/pci.c
+++ b/core/pci.c
@@ -1334,7 +1334,7 @@  void pci_std_swizzle_irq_map(struct dt_node *np,
 {
 	uint32_t *map, *p;
 	int dev, irq, esize, edevcount;
-	size_t map_size, isize;
+	size_t map_size;
 
 	/* Some emulated setups don't use standard interrupts
 	 * representation
@@ -1342,9 +1342,6 @@  void pci_std_swizzle_irq_map(struct dt_node *np,
 	if (lstate->int_size == 0)
 		return;
 
-	/* Size in bytes of a target interrupt */
-	isize = lstate->int_size * sizeof(uint32_t);
-
 	/* Calculate the size of a map entry:
 	 *
 	 * 3 cells : PCI Address
@@ -1384,22 +1381,23 @@  void pci_std_swizzle_irq_map(struct dt_node *np,
 	for (dev = 0; dev < edevcount; dev++) {
 		for (irq = 0; irq < 4; irq++) {
 			/* Calculate pin */
+			size_t i;
 			uint32_t new_irq = (irq + dev + swizzle) % 4;
 
 			/* PCI address portion */
-			*(p++) = dev << (8 + 3);
+			*(p++) = cpu_to_be32(dev << (8 + 3));
 			*(p++) = 0;
 			*(p++) = 0;
 
 			/* PCI interrupt portion */
-			*(p++) = irq + 1;
+			*(p++) = cpu_to_be32(irq + 1);
 
 			/* Parent phandle */
-			*(p++) = lstate->int_parent[new_irq];
+			*(p++) = cpu_to_be32(lstate->int_parent[new_irq]);
 
 			/* Parent desc */
-			memcpy(p, lstate->int_val[new_irq], isize);
-			p += lstate->int_size;
+			for (i = 0; i < lstate->int_size; i++)
+				*(p++) = cpu_to_be32(lstate->int_val[new_irq][i]);
 		}
 	}
 
@@ -1549,16 +1547,16 @@  static void __noinline pci_add_one_device_node(struct phb *phb,
 	char name[MAX_NAME];
 	char compat[MAX_NAME];
 	uint32_t rev_class, vdid;
-	uint32_t reg[5];
+	__be32 reg[5];
 	uint8_t intpin;
 	bool is_pcie;
-	const uint32_t ranges_direct[] = {
+	const __be32 ranges_direct[] = {
 				/* 64-bit direct mapping. We know the bridges
 				 * don't cover the entire address space so
 				 * use 0xf00... as a good compromise. */
-				0x02000000, 0x0, 0x0,
-				0x02000000, 0x0, 0x0,
-				0xf0000000, 0x0};
+				cpu_to_be32(0x02000000), 0x0, 0x0,
+				cpu_to_be32(0x02000000), 0x0, 0x0,
+				cpu_to_be32(0xf0000000), 0x0};
 
 	pci_cfg_read32(phb, pd->bdfn, 0, &vdid);
 	pci_cfg_read32(phb, pd->bdfn, PCI_CFG_REV_ID, &rev_class);
@@ -1635,7 +1633,7 @@  static void __noinline pci_add_one_device_node(struct phb *phb,
 	 * entry in the "reg" property. That's enough for Linux and we might
 	 * even want to make this legit in future ePAPR
 	 */
-	reg[0] = pd->bdfn << 8;
+	reg[0] = cpu_to_be32(pd->bdfn << 8);
 	reg[1] = reg[2] = reg[3] = reg[4] = 0;
 	dt_add_property(np, "reg", reg, sizeof(reg));
 
diff --git a/hdata/fsp.c b/hdata/fsp.c
index 5923f1feb..fe36eef18 100644
--- a/hdata/fsp.c
+++ b/hdata/fsp.c
@@ -206,7 +206,7 @@  static void fsp_create_links(const void *spss, int index,
 		chip = fsp_create_link(iopath, i, index);
 		lp = lcount++;
 		links = realloc(links, 4 * lcount);
-		links[lp] = chip;
+		links[lp] = cpu_to_be32(chip);
 	}
 	if (links)
 		dt_add_property(fsp_node, "ibm,psi-links", links, lcount * 4);
@@ -268,7 +268,7 @@  static void add_uart(const struct spss_iopath *iopath, struct dt_node *lpc)
 		be32_to_cpu(iopath->lpc.uart_baud));
 }
 
-static void add_chip_id_to_sensors(struct dt_node *sensor_node, __be32 slca_index)
+static void add_chip_id_to_sensors(struct dt_node *sensor_node, uint32_t slca_index)
 {
 	unsigned int i;
 	const void *hdif;
@@ -347,7 +347,8 @@  static void add_ipmi_sensors(struct dt_node *bmc_node)
 		dt_add_property_cells(sensor_node, "ipmi-sensor-type",
 				      ipmi_sensors->data[i].type);
 
-		add_chip_id_to_sensors(sensor_node, ipmi_sensors->data[i].slca_index);
+		add_chip_id_to_sensors(sensor_node,
+				be32_to_cpu(ipmi_sensors->data[i].slca_index));
 	}
 }
 
diff --git a/hdata/iohub.c b/hdata/iohub.c
index 6921d95ce..2af040a2f 100644
--- a/hdata/iohub.c
+++ b/hdata/iohub.c
@@ -109,12 +109,12 @@  static struct dt_node *io_add_phb3(const struct cechub_io_hub *hub,
 	/* "reg" property contains in order the PE, PCI and SPCI XSCOM
 	 * addresses
 	 */
-	reg[0] = pe_xscom;
-	reg[1] = 0x20;
-	reg[2] = pci_xscom;
-	reg[3] = 0x05;
-	reg[4] = spci_xscom;
-	reg[5] = 0x15;
+	reg[0] = cpu_to_be32(pe_xscom);
+	reg[1] = cpu_to_be32(0x20);
+	reg[2] = cpu_to_be32(pci_xscom);
+	reg[3] = cpu_to_be32(0x05);
+	reg[4] = cpu_to_be32(spci_xscom);
+	reg[5] = cpu_to_be32(0x15);
 	dt_add_property(pbcq, "reg", reg, sizeof(reg));
 
 	/* A couple more things ... */
@@ -214,10 +214,10 @@  static struct dt_node *io_add_phb4(const struct cechub_io_hub *hub,
 		return NULL;
 
 	/* "reg" property contains (in order) the PE and PCI XSCOM addresses */
-	reg[0] = pe_xscom;
-	reg[1] = 0x100;
-	reg[2] = pci_xscom;
-	reg[3] = 0x200;
+	reg[0] = cpu_to_be32(pe_xscom);
+	reg[1] = cpu_to_be32(0x100);
+	reg[2] = cpu_to_be32(pci_xscom);
+	reg[3] = cpu_to_be32(0x200);
 	dt_add_property(pbcq, "reg", reg, sizeof(reg));
 
 	/* The hubs themselves go under the stacks */
diff --git a/hdata/paca.c b/hdata/paca.c
index 28025b0cd..6ebb75320 100644
--- a/hdata/paca.c
+++ b/hdata/paca.c
@@ -174,8 +174,8 @@  static void add_xics_icps(void)
 					"IBM,ppc-xicp",
 					"IBM,power7-xicp");
 
-		irange[0] = dt_property_get_cell(intsrv, 0); /* Index */
-		irange[1] = num_threads;		     /* num servers */
+		irange[0] = cpu_to_be32(dt_property_get_cell(intsrv, 0)); /* Index */
+		irange[1] = cpu_to_be32(num_threads);		     /* num servers */
 		dt_add_property(icp, "ibm,interrupt-server-ranges",
 				irange, sizeof(irange));
 		dt_add_property(icp, "interrupt-controller", NULL, 0);
@@ -183,10 +183,10 @@  static void add_xics_icps(void)
 		dt_add_property_string(icp, "device_type",
 				   "PowerPC-External-Interrupt-Presentation");
 		for (i = 0; i < num_threads*2; i += 2) {
-			reg[i] = ibase;
+			reg[i] = cpu_to_be64(ibase);
 			/* One page is enough for a handful of regs. */
-			reg[i+1] = 4096;
-			ibase += reg[i+1];
+			reg[i+1] = cpu_to_be64(4096);
+			ibase += be64_to_cpu(reg[i+1]);
 		}
 		dt_add_property(icp, "reg", reg, sizeof(reg));	
 	}
diff --git a/hw/fsp/fsp-sysparam.c b/hw/fsp/fsp-sysparam.c
index 09005ef87..0e1e8181f 100644
--- a/hw/fsp/fsp-sysparam.c
+++ b/hw/fsp/fsp-sysparam.c
@@ -469,8 +469,8 @@  static void add_opal_sysparam_node(void)
 		strcpy(s, sysparam_attrs[i].name);
 		s = s + strlen(sysparam_attrs[i].name) + 1;
 
-		ids[i] = sysparam_attrs[i].id;
-		lens[i] = sysparam_attrs[i].length;
+		ids[i] = cpu_to_be32(sysparam_attrs[i].id);
+		lens[i] = cpu_to_be32(sysparam_attrs[i].length);
 		perms[i] = sysparam_attrs[i].perm;
 	}
 
diff --git a/hw/imc.c b/hw/imc.c
index ca06f3c36..16b060d39 100644
--- a/hw/imc.c
+++ b/hw/imc.c
@@ -458,8 +458,8 @@  static void imc_dt_update_nest_node(struct dt_node *dev)
 	base_addr = malloc(sizeof(uint64_t) * nr_chip);
 	chipids = malloc(sizeof(uint32_t) * nr_chip);
 	for_each_chip(chip) {
-		base_addr[i] = chip->homer_base;
-		chipids[i] = chip->id;
+		base_addr[i] = cpu_to_be64(chip->homer_base);
+		chipids[i] = cpu_to_be32(chip->id);
 		i++;
 	}
 
diff --git a/hw/lpc.c b/hw/lpc.c
index 354d2b4f0..3411f036f 100644
--- a/hw/lpc.c
+++ b/hw/lpc.c
@@ -884,9 +884,9 @@  static void lpc_create_int_map(struct lpcm *lpc, struct dt_node *psi_node)
 			continue;
 		*(pmap++) = 0;
 		*(pmap++) = 0;
-		*(pmap++) = i;
-		*(pmap++) = psi_node->phandle;
-		*(pmap++) = lpc->sirq_routes[i] + P9_PSI_IRQ_LPC_SIRQ0;
+		*(pmap++) = cpu_to_be32(i);
+		*(pmap++) = cpu_to_be32(psi_node->phandle);
+		*(pmap++) = cpu_to_be32(lpc->sirq_routes[i] + P9_PSI_IRQ_LPC_SIRQ0);
 	}
 	if (pmap == map)
 		return;
diff --git a/hw/psi.c b/hw/psi.c
index bc170bbcf..3b497a092 100644
--- a/hw/psi.c
+++ b/hw/psi.c
@@ -786,10 +786,10 @@  static void psi_create_p9_int_map(struct psi *psi, struct dt_node *np)
 	int i;
 
 	for (i = 0; i < P9_PSI_NUM_IRQS; i++) {
-		map[i][0] = i;
-		map[i][1] = get_ics_phandle();
-		map[i][2] = psi->interrupt + i;
-		map[i][3] = 1;
+		map[i][0] = cpu_to_be32(i);
+		map[i][1] = cpu_to_be32(get_ics_phandle());
+		map[i][2] = cpu_to_be32(psi->interrupt + i);
+		map[i][3] = cpu_to_be32(1);
 	}
 	dt_add_property(np, "interrupt-map", map, sizeof(map));
 	dt_add_property_cells(np, "#address-cells", 0);
diff --git a/hw/vas.c b/hw/vas.c
index 212da0ec1..3c5ebc920 100644
--- a/hw/vas.c
+++ b/hw/vas.c
@@ -375,7 +375,7 @@  static struct vas *alloc_vas(uint32_t chip_id, uint32_t vas_id, uint64_t base)
 
 static void create_mm_dt_node(struct proc_chip *chip)
 {
-	int gcid;
+	uint32_t gcid, vas_id;
 	struct dt_node *dn;
 	struct vas *vas;
 	uint64_t hvwc_start, hvwc_len;
@@ -384,7 +384,8 @@  static void create_mm_dt_node(struct proc_chip *chip)
 	uint64_t pbf_start, pbf_nbits;
 
 	vas = chip->vas;
-	gcid = chip->id;
+	vas_id = cpu_to_be32(vas->vas_id);
+	gcid = cpu_to_be32(chip->id);
 	get_hvwc_mmio_bar(chip->id, &hvwc_start, &hvwc_len);
 	get_uwc_mmio_bar(chip->id, &uwc_start, &uwc_len);
 	get_paste_bar(chip->id, &pbar_start, &pbar_len);
@@ -400,7 +401,7 @@  static void create_mm_dt_node(struct proc_chip *chip)
 					pbar_start, pbar_len,
 					pbf_start, pbf_nbits);
 
-	dt_add_property(dn, "ibm,vas-id", &vas->vas_id, sizeof(vas->vas_id));
+	dt_add_property(dn, "ibm,vas-id", &vas_id, sizeof(vas_id));
 	dt_add_property(dn, "ibm,chip-id", &gcid, sizeof(gcid));
 }