diff mbox series

[v3,1/1] hw/arm/sbsa-ref: use XHCI to replace EHCI

Message ID 20230605095536.117384-2-wangyuquan1236@phytium.com.cn
State New
Headers show
Series use XHCI to replace EHCI | expand

Commit Message

Yuquan Wang June 5, 2023, 9:55 a.m. UTC
The current sbsa-ref cannot use EHCI controller which is only
able to do 32-bit DMA, since sbsa-ref doesn't have RAM below 4GB.
Hence, this uses XHCI to provide a usb controller with 64-bit
DMA capablity instead of EHCI.

Signed-off-by: Yuquan Wang <wangyuquan1236@phytium.com.cn>
---
 hw/arm/sbsa-ref.c | 21 ++++++++++++---------
 1 file changed, 12 insertions(+), 9 deletions(-)

Comments

Marcin Juszkiewicz June 5, 2023, 9:59 a.m. UTC | #1
W dniu 5.06.2023 o 11:55, Yuquan Wang pisze:
> The current sbsa-ref cannot use EHCI controller which is only
> able to do 32-bit DMA, since sbsa-ref doesn't have RAM below 4GB.
> Hence, this uses XHCI to provide a usb controller with 64-bit
> DMA capablity instead of EHCI.
> 
> Signed-off-by: Yuquan Wang<wangyuquan1236@phytium.com.cn>

Can you share firmware side so it can be tested?

The more I deal with EDK2 the more I understand why people go U-Boot.
Yuquan Wang June 5, 2023, 12:13 p.m. UTC | #2
Hi, Marcin

On Mon, 5 Jun 2023 11:59:16 +0200, Marcin Juszkiewicz wrote:

> 
> W dniu 5.06.2023 o 11:55, Yuquan Wang pisze:
> > The current sbsa-ref cannot use EHCI controller which is only
> > able to do 32-bit DMA, since sbsa-ref doesn't have RAM below 4GB.
> > Hence, this uses XHCI to provide a usb controller with 64-bit
> > DMA capablity instead of EHCI.
> > 
> > Signed-off-by: Yuquan Wang<wangyuquan1236@phytium.com.cn>
> 
> Can you share firmware side so it can be tested?
> 
> The more I deal with EDK2 the more I understand why people go U-Boot.

I figured out the stuck problem of the relevant firmware patch in edk2 
mail list. 

Below is the patchset link:
https://edk2.groups.io/g/devel/message/105713

Thanks
Yuquan

信息安全声明:本邮件包含信息归发件人所在组织所有,发件人所在组织对该邮件拥有所有权利。请接收者注意保密,未经发件人书面许可,不得向任何第三方组织和个人透露本邮件所含信息。
Information Security Notice: The information contained in this mail is solely property of the sender's organization.This mail communication is confidential.Recipients named above are obligated to maintain secrecy and are not permitted to disclose the contents of this communication to others.
Marcin Juszkiewicz June 6, 2023, 9:47 a.m. UTC | #3
W dniu 5.06.2023 o 11:55, Yuquan Wang pisze:
> The current sbsa-ref cannot use EHCI controller which is only
> able to do 32-bit DMA, since sbsa-ref doesn't have RAM below 4GB.
> Hence, this uses XHCI to provide a usb controller with 64-bit
> DMA capablity instead of EHCI.
> 
> Signed-off-by: Yuquan Wang<wangyuquan1236@phytium.com.cn>

Reviewed-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>

Without EDK2 changes Linux behaves same way (no USB found), with EDK2 
changes (EHCI->XHCI) Linux gets USB devices.
Peter Maydell June 6, 2023, 10:04 a.m. UTC | #4
On Tue, 6 Jun 2023 at 10:47, Marcin Juszkiewicz
<marcin.juszkiewicz@linaro.org> wrote:
>
> W dniu 5.06.2023 o 11:55, Yuquan Wang pisze:
> > The current sbsa-ref cannot use EHCI controller which is only
> > able to do 32-bit DMA, since sbsa-ref doesn't have RAM below 4GB.
> > Hence, this uses XHCI to provide a usb controller with 64-bit
> > DMA capablity instead of EHCI.
> >
> > Signed-off-by: Yuquan Wang<wangyuquan1236@phytium.com.cn>
>
> Reviewed-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
>
> Without EDK2 changes Linux behaves same way (no USB found), with EDK2
> changes (EHCI->XHCI) Linux gets USB devices.

So it doesn't break (cause to crash) old EDK2 images? That's a
pleasant surprise.

-- PMM
Marcin Juszkiewicz June 6, 2023, 10:19 a.m. UTC | #5
W dniu 6.06.2023 o 12:04, Peter Maydell pisze:
> On Tue, 6 Jun 2023 at 10:47, Marcin Juszkiewicz
> <marcin.juszkiewicz@linaro.org> wrote:
>>
>> W dniu 5.06.2023 o 11:55, Yuquan Wang pisze:
>>> The current sbsa-ref cannot use EHCI controller which is only
>>> able to do 32-bit DMA, since sbsa-ref doesn't have RAM below 4GB.
>>> Hence, this uses XHCI to provide a usb controller with 64-bit
>>> DMA capablity instead of EHCI.
>>>
>>> Signed-off-by: Yuquan Wang<wangyuquan1236@phytium.com.cn>
>>
>> Reviewed-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
>>
>> Without EDK2 changes Linux behaves same way (no USB found), with EDK2
>> changes (EHCI->XHCI) Linux gets USB devices.
> 
> So it doesn't break (cause to crash) old EDK2 images? That's a
> pleasant surprise.

In both cases with not modified EDK2 Linux behaves the same:

ehci-platform LNRO0D20:00: Error: DMA mask configuration failed
ehci-platform: probe of LNRO0D20:00 failed with error -5
Marcin Juszkiewicz June 6, 2023, 1:47 p.m. UTC | #6
W dniu 5.06.2023 o 11:55, Yuquan Wang pisze:
> The current sbsa-ref cannot use EHCI controller which is only
> able to do 32-bit DMA, since sbsa-ref doesn't have RAM below 4GB.
> Hence, this uses XHCI to provide a usb controller with 64-bit
> DMA capablity instead of EHCI.

Please also modify hw/arm/Kconfig file so SBSA-ref will select XHCI 
instead of EHCI there.
diff mbox series

Patch

diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
index de21200ff9..4fb65704d4 100644
--- a/hw/arm/sbsa-ref.c
+++ b/hw/arm/sbsa-ref.c
@@ -40,6 +40,7 @@ 
 #include "hw/pci-host/gpex.h"
 #include "hw/qdev-properties.h"
 #include "hw/usb.h"
+#include "hw/usb/xhci.h"
 #include "hw/char/pl011.h"
 #include "hw/watchdog/sbsa_gwdt.h"
 #include "net/net.h"
@@ -82,7 +83,7 @@  enum {
     SBSA_SECURE_UART_MM,
     SBSA_SECURE_MEM,
     SBSA_AHCI,
-    SBSA_EHCI,
+    SBSA_XHCI,
 };
 
 struct SBSAMachineState {
@@ -119,7 +120,7 @@  static const MemMapEntry sbsa_ref_memmap[] = {
     [SBSA_SMMU] =               { 0x60050000, 0x00020000 },
     /* Space here reserved for more SMMUs */
     [SBSA_AHCI] =               { 0x60100000, 0x00010000 },
-    [SBSA_EHCI] =               { 0x60110000, 0x00010000 },
+    [SBSA_XHCI] =               { 0x60110000, 0x00010000 },
     /* Space here reserved for other devices */
     [SBSA_PCIE_PIO] =           { 0x7fff0000, 0x00010000 },
     /* 32-bit address PCIE MMIO space */
@@ -139,7 +140,7 @@  static const int sbsa_ref_irqmap[] = {
     [SBSA_SECURE_UART] = 8,
     [SBSA_SECURE_UART_MM] = 9,
     [SBSA_AHCI] = 10,
-    [SBSA_EHCI] = 11,
+    [SBSA_XHCI] = 11,
     [SBSA_SMMU] = 12, /* ... to 15 */
     [SBSA_GWDT_WS0] = 16,
 };
@@ -575,13 +576,15 @@  static void create_ahci(const SBSAMachineState *sms)
     }
 }
 
-static void create_ehci(const SBSAMachineState *sms)
+static void create_xhci(const SBSAMachineState *sms)
 {
-    hwaddr base = sbsa_ref_memmap[SBSA_EHCI].base;
-    int irq = sbsa_ref_irqmap[SBSA_EHCI];
+    hwaddr base = sbsa_ref_memmap[SBSA_XHCI].base;
+    int irq = sbsa_ref_irqmap[SBSA_XHCI];
+    DeviceState *dev = qdev_new(TYPE_XHCI_SYSBUS);
 
-    sysbus_create_simple("platform-ehci-usb", base,
-                         qdev_get_gpio_in(sms->gic, irq));
+    sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
+    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
+    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, qdev_get_gpio_in(sms->gic, irq));
 }
 
 static void create_smmu(const SBSAMachineState *sms, PCIBus *bus)
@@ -803,7 +806,7 @@  static void sbsa_ref_init(MachineState *machine)
 
     create_ahci(sms);
 
-    create_ehci(sms);
+    create_xhci(sms);
 
     create_pcie(sms);