Show patches with: Submitter = Peter Maydell       |    State = Action Required       |    Archived = No       |   14773 patches
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Patch Series A/F/R/T S/W/F Date Submitter Delegate State
docs/system/arm: Add FEAT_HCX to list of emulated features docs/system/arm: Add FEAT_HCX to list of emulated features - 1 1 - --- 2022-05-20 Peter Maydell New
[PULL,22/22] target/arm: Use FIELD definitions for CPACR, CPTR_ELx [PULL,01/22] target/arm: Postpone interpretation of stage 2 descriptor attribute bits - - 1 - --- 2022-05-19 Peter Maydell New
[PULL,21/22] target/arm: Enable FEAT_HCX for -cpu max [PULL,01/22] target/arm: Postpone interpretation of stage 2 descriptor attribute bits - - 1 - --- 2022-05-19 Peter Maydell New
[PULL,20/22] target/arm: Fix PAuth keys access checks for disabled SEL2 [PULL,01/22] target/arm: Postpone interpretation of stage 2 descriptor attribute bits - - 1 - --- 2022-05-19 Peter Maydell New
[PULL,19/22] ptimer: Rename PTIMER_POLICY_DEFAULT to PTIMER_POLICY_LEGACY [PULL,01/22] target/arm: Postpone interpretation of stage 2 descriptor attribute bits - - 2 - --- 2022-05-19 Peter Maydell New
[PULL,18/22] hw/arm/virt: Drop #size-cells and #address-cells from gpio-keys dtb node [PULL,01/22] target/arm: Postpone interpretation of stage 2 descriptor attribute bits - - 1 - --- 2022-05-19 Peter Maydell New
[PULL,17/22] hw/arm/virt: Fix incorrect non-secure flash dtb node name [PULL,01/22] target/arm: Postpone interpretation of stage 2 descriptor attribute bits - - 1 - --- 2022-05-19 Peter Maydell New
[PULL,16/22] target/arm: Make number of counters in PMCR follow the CPU [PULL,01/22] target/arm: Postpone interpretation of stage 2 descriptor attribute bits - - 1 - --- 2022-05-19 Peter Maydell New
[PULL,15/22] target/arm/helper.c: Delete stray obsolete comment [PULL,01/22] target/arm: Postpone interpretation of stage 2 descriptor attribute bits - - 2 - --- 2022-05-19 Peter Maydell New
[PULL,14/22] hw/adc/zynq-xadc: Use qemu_irq typedef [PULL,01/22] target/arm: Postpone interpretation of stage 2 descriptor attribute bits - - 1 - --- 2022-05-19 Peter Maydell New
[PULL,13/22] Fix aarch64 debug register names. [PULL,01/22] target/arm: Postpone interpretation of stage 2 descriptor attribute bits - - 1 - --- 2022-05-19 Peter Maydell New
[PULL,12/22] hw/intc/arm_gicv3: Provide ich_num_aprs() [PULL,01/22] target/arm: Postpone interpretation of stage 2 descriptor attribute bits - - 1 - --- 2022-05-19 Peter Maydell New
[PULL,11/22] hw/intc/arm_gicv3: Use correct number of priority bits for the CPU [PULL,01/22] target/arm: Postpone interpretation of stage 2 descriptor attribute bits - - 1 - --- 2022-05-19 Peter Maydell New
[PULL,10/22] hw/intc/arm_gicv3: Support configurable number of physical priority bits [PULL,01/22] target/arm: Postpone interpretation of stage 2 descriptor attribute bits - - 1 - --- 2022-05-19 Peter Maydell New
[PULL,09/22] hw/intc/arm_gicv3_kvm.c: Stop using GIC_MIN_BPR constant [PULL,01/22] target/arm: Postpone interpretation of stage 2 descriptor attribute bits - - 1 - --- 2022-05-19 Peter Maydell New
[PULL,08/22] hw/intc/arm_gicv3: report correct PRIbits field in ICV_CTLR_EL1 [PULL,01/22] target/arm: Postpone interpretation of stage 2 descriptor attribute bits - - 1 - --- 2022-05-19 Peter Maydell New
[PULL,07/22] hw/intc/arm_gicv3_cpuif: Handle CPUs that don't specify GICv3 parameters [PULL,01/22] target/arm: Postpone interpretation of stage 2 descriptor attribute bits - - 1 - --- 2022-05-19 Peter Maydell New
[PULL,06/22] target/arm: Drop unsupported_encoding() macro [PULL,01/22] target/arm: Postpone interpretation of stage 2 descriptor attribute bits - - 2 - --- 2022-05-19 Peter Maydell New
[PULL,05/22] target/arm: Implement FEAT_IDST [PULL,01/22] target/arm: Postpone interpretation of stage 2 descriptor attribute bits - - 1 - --- 2022-05-19 Peter Maydell New
[PULL,04/22] target/arm: Enable FEAT_S2FWB for -cpu max [PULL,01/22] target/arm: Postpone interpretation of stage 2 descriptor attribute bits - - 1 - --- 2022-05-19 Peter Maydell New
[PULL,03/22] target/arm: Implement FEAT_S2FWB [PULL,01/22] target/arm: Postpone interpretation of stage 2 descriptor attribute bits - - 1 - --- 2022-05-19 Peter Maydell New
[PULL,02/22] target/arm: Factor out FWB=0 specific part of combine_cacheattrs() [PULL,01/22] target/arm: Postpone interpretation of stage 2 descriptor attribute bits - - 1 - --- 2022-05-19 Peter Maydell New
[PULL,01/22] target/arm: Postpone interpretation of stage 2 descriptor attribute bits [PULL,01/22] target/arm: Postpone interpretation of stage 2 descriptor attribute bits - - 1 - --- 2022-05-19 Peter Maydell New
[PULL,00/22] target-arm queue - - - - --- 2022-05-19 Peter Maydell New
ptimer: Rename PTIMER_POLICY_DEFAULT to PTIMER_POLICY_LEGACY ptimer: Rename PTIMER_POLICY_DEFAULT to PTIMER_POLICY_LEGACY - - 2 - --- 2022-05-16 Peter Maydell New
hw/tpm/tpm_tis_common.c: Assert that locty is in range hw/tpm/tpm_tis_common.c: Assert that locty is in range - - 1 - --- 2022-05-13 Peter Maydell New
target/arm/helper.c: Delete stray obsolete comment target/arm/helper.c: Delete stray obsolete comment - - 2 - --- 2022-05-13 Peter Maydell New
[2/2] hw/arm/virt: Drop #size-cells and #address-cells from gpio-keys dtb node hw/arm/virt: fix dtb nits spotted by dtc - - 1 - --- 2022-05-13 Peter Maydell New
[1/2] hw/arm/virt: Fix incorrect non-secure flash dtb node name hw/arm/virt: fix dtb nits spotted by dtc - - 1 - --- 2022-05-13 Peter Maydell New
target/arm: Make number of counters in PMCR follow the CPU target/arm: Make number of counters in PMCR follow the CPU - - 1 - --- 2022-05-13 Peter Maydell New
[v2,6/6] hw/intc/arm_gicv3: Provide ich_num_aprs() gicv3: Use right number of prio bits for the CPU - - 1 - --- 2022-05-12 Peter Maydell New
[v2,5/6] hw/intc/arm_gicv3: Use correct number of priority bits for the CPU gicv3: Use right number of prio bits for the CPU - - 1 - --- 2022-05-12 Peter Maydell New
[v2,4/6] hw/intc/arm_gicv3: Support configurable number of physical priority bits gicv3: Use right number of prio bits for the CPU - - 1 - --- 2022-05-12 Peter Maydell New
[v2,3/6] hw/intc/arm_gicv3_kvm.c: Stop using GIC_MIN_BPR constant gicv3: Use right number of prio bits for the CPU - - 1 - --- 2022-05-12 Peter Maydell New
[v2,2/6] hw/intc/arm_gicv3: report correct PRIbits field in ICV_CTLR_EL1 gicv3: Use right number of prio bits for the CPU - - 1 - --- 2022-05-12 Peter Maydell New
[v2,1/6] hw/intc/arm_gicv3_cpuif: Handle CPUs that don't specify GICv3 parameters gicv3: Use right number of prio bits for the CPU - - 1 - --- 2022-05-12 Peter Maydell New
target/arm: Drop unsupported_encoding() macro target/arm: Drop unsupported_encoding() macro - - 1 - --- 2022-05-09 Peter Maydell New
target/arm: Implement FEAT_IDST target/arm: Implement FEAT_IDST - - 1 - --- 2022-05-09 Peter Maydell New
[PULL,32/32] hw/acpi/aml-build: Use existing CPU topology to build PPTT table [PULL,01/32] MAINTAINERS/.mailmap: update email for Leif Lindholm 2 - 1 1 --- 2022-05-09 Peter Maydell New
[PULL,31/32] hw/arm/virt: Fix CPU's default NUMA node ID [PULL,01/32] MAINTAINERS/.mailmap: update email for Leif Lindholm - - 2 - --- 2022-05-09 Peter Maydell New
[PULL,30/32] qtest/numa-test: Correct CPU and NUMA association in aarch64_numa_cpu() [PULL,01/32] MAINTAINERS/.mailmap: update email for Leif Lindholm 1 - - - --- 2022-05-09 Peter Maydell New
[PULL,29/32] hw/arm/virt: Consider SMP configuration in CPU topology [PULL,01/32] MAINTAINERS/.mailmap: update email for Leif Lindholm 1 - 1 - --- 2022-05-09 Peter Maydell New
[PULL,28/32] qtest/numa-test: Specify CPU topology in aarch64_numa_cpu() [PULL,01/32] MAINTAINERS/.mailmap: update email for Leif Lindholm - - 1 - --- 2022-05-09 Peter Maydell New
[PULL,27/32] qapi/machine.json: Add cluster-id [PULL,01/32] MAINTAINERS/.mailmap: update email for Leif Lindholm 1 - 1 - --- 2022-05-09 Peter Maydell New
[PULL,26/32] hw/arm: add versioning to sbsa-ref machine DT [PULL,01/32] MAINTAINERS/.mailmap: update email for Leif Lindholm - - 1 - --- 2022-05-09 Peter Maydell New
[PULL,25/32] target/arm: Define neoverse-n1 [PULL,01/32] MAINTAINERS/.mailmap: update email for Leif Lindholm - - 1 - --- 2022-05-09 Peter Maydell New
[PULL,24/32] target/arm: Define cortex-a76 [PULL,01/32] MAINTAINERS/.mailmap: update email for Leif Lindholm - - 1 - --- 2022-05-09 Peter Maydell New
[PULL,23/32] target/arm: Enable FEAT_DGH for -cpu max [PULL,01/32] MAINTAINERS/.mailmap: update email for Leif Lindholm - - 1 - --- 2022-05-09 Peter Maydell New
[PULL,22/32] target/arm: Enable FEAT_CSV3 for -cpu max [PULL,01/32] MAINTAINERS/.mailmap: update email for Leif Lindholm - - 1 - --- 2022-05-09 Peter Maydell New
[PULL,21/32] target/arm: Enable FEAT_CSV2_2 for -cpu max [PULL,01/32] MAINTAINERS/.mailmap: update email for Leif Lindholm - - 1 - --- 2022-05-09 Peter Maydell New
[PULL,20/32] target/arm: Enable FEAT_CSV2 for -cpu max [PULL,01/32] MAINTAINERS/.mailmap: update email for Leif Lindholm - - 1 - --- 2022-05-09 Peter Maydell New
[PULL,19/32] target/arm: Enable FEAT_IESB for -cpu max [PULL,01/32] MAINTAINERS/.mailmap: update email for Leif Lindholm - - 1 - --- 2022-05-09 Peter Maydell New
[PULL,18/32] target/arm: Enable FEAT_RAS for -cpu max [PULL,01/32] MAINTAINERS/.mailmap: update email for Leif Lindholm - - 1 - --- 2022-05-09 Peter Maydell New
[PULL,17/32] target/arm: Implement ESB instruction [PULL,01/32] MAINTAINERS/.mailmap: update email for Leif Lindholm - - 1 - --- 2022-05-09 Peter Maydell New
[PULL,16/32] target/arm: Implement virtual SError exceptions [PULL,01/32] MAINTAINERS/.mailmap: update email for Leif Lindholm - - 1 - --- 2022-05-09 Peter Maydell New
[PULL,15/32] target/arm: Enable SCR and HCR bits for RAS [PULL,01/32] MAINTAINERS/.mailmap: update email for Leif Lindholm - - 1 - --- 2022-05-09 Peter Maydell New
[PULL,14/32] target/arm: Add minimal RAS registers [PULL,01/32] MAINTAINERS/.mailmap: update email for Leif Lindholm - - 1 - --- 2022-05-09 Peter Maydell New
[PULL,13/32] target/arm: Enable FEAT_Debugv8p4 for -cpu max [PULL,01/32] MAINTAINERS/.mailmap: update email for Leif Lindholm - - 1 - --- 2022-05-09 Peter Maydell New
[PULL,12/32] target/arm: Enable FEAT_Debugv8p2 for -cpu max [PULL,01/32] MAINTAINERS/.mailmap: update email for Leif Lindholm - - 1 - --- 2022-05-09 Peter Maydell New
[PULL,11/32] target/arm: Use field names for manipulating EL2 and EL3 modes [PULL,01/32] MAINTAINERS/.mailmap: update email for Leif Lindholm - - 1 - --- 2022-05-09 Peter Maydell New
[PULL,10/32] target/arm: Annotate arm_max_initfn with FEAT identifiers [PULL,01/32] MAINTAINERS/.mailmap: update email for Leif Lindholm - - 1 - --- 2022-05-09 Peter Maydell New
[PULL,09/32] target/arm: Split out aa32_max_features [PULL,01/32] MAINTAINERS/.mailmap: update email for Leif Lindholm - - 1 - --- 2022-05-09 Peter Maydell New
[PULL,08/32] target/arm: Set ID_DFR0.PerfMon for qemu-system-arm -cpu max [PULL,01/32] MAINTAINERS/.mailmap: update email for Leif Lindholm - 1 1 - --- 2022-05-09 Peter Maydell New
[PULL,07/32] target/arm: Update qemu-system-arm -cpu max to cortex-a57 [PULL,01/32] MAINTAINERS/.mailmap: update email for Leif Lindholm - - 1 - --- 2022-05-09 Peter Maydell New
[PULL,06/32] target/arm: Move cortex impdef sysregs to cpu_tcg.c [PULL,01/32] MAINTAINERS/.mailmap: update email for Leif Lindholm - - 1 - --- 2022-05-09 Peter Maydell New
[PULL,05/32] target/arm: Adjust definition of CONTEXTIDR_EL2 [PULL,01/32] MAINTAINERS/.mailmap: update email for Leif Lindholm - - 1 - --- 2022-05-09 Peter Maydell New
[PULL,04/32] target/arm: Merge zcr reginfo [PULL,01/32] MAINTAINERS/.mailmap: update email for Leif Lindholm - - 1 - --- 2022-05-09 Peter Maydell New
[PULL,03/32] target/arm: Drop EL3 no EL2 fallbacks [PULL,01/32] MAINTAINERS/.mailmap: update email for Leif Lindholm - - 1 - --- 2022-05-09 Peter Maydell New
[PULL,02/32] target/arm: Handle cpreg registration for missing EL [PULL,01/32] MAINTAINERS/.mailmap: update email for Leif Lindholm - - 1 - --- 2022-05-09 Peter Maydell New
[PULL,01/32] MAINTAINERS/.mailmap: update email for Leif Lindholm [PULL,01/32] MAINTAINERS/.mailmap: update email for Leif Lindholm - - 1 - --- 2022-05-09 Peter Maydell New
[PULL,00/32] target-arm queue - - - - --- 2022-05-09 Peter Maydell New
[5/5] hw/intc/arm_gicv3: Provide ich_num_aprs() gicv3: Use right number of prio bits for the CPU - - - - --- 2022-05-06 Peter Maydell New
[4/5] hw/intc/arm_gicv3: Use correct number of priority bits for the CPU gicv3: Use right number of prio bits for the CPU - - - - --- 2022-05-06 Peter Maydell New
[3/5] hw/intc/arm_gicv3: Support configurable number of physical priority bits gicv3: Use right number of prio bits for the CPU - - - - --- 2022-05-06 Peter Maydell New
[2/5] hw/intc/arm_gicv3_kvm.c: Stop using GIC_MIN_BPR constant gicv3: Use right number of prio bits for the CPU - - - - --- 2022-05-06 Peter Maydell New
[1/5] hw/intc/arm_gicv3: report correct PRIbits field in ICV_CTLR_EL1 gicv3: Use right number of prio bits for the CPU - - - - --- 2022-05-06 Peter Maydell New
[4/4] target/arm: Enable FEAT_S2FWB for -cpu max target/arm: Implement S2FWB - - 1 - --- 2022-05-05 Peter Maydell New
[3/4] target/arm: Implement FEAT_S2FWB target/arm: Implement S2FWB - - 1 - --- 2022-05-05 Peter Maydell New
[2/4] target/arm: Factor out FWB=0 specific part of combine_cacheattrs() target/arm: Implement S2FWB - - 1 - --- 2022-05-05 Peter Maydell New
[1/4] target/arm: Postpone interpretation of stage 2 descriptor attribute bits target/arm: Implement S2FWB - - 1 - --- 2022-05-05 Peter Maydell New
[v2] hw/block/fdc-sysbus: Always mark sysbus floppy controllers as not having DMA [v2] hw/block/fdc-sysbus: Always mark sysbus floppy controllers as not having DMA - - 2 - --- 2022-05-05 Peter Maydell New
[v2] Fix 'writeable' typos [v2] Fix 'writeable' typos - - 1 - --- 2022-05-05 Peter Maydell New
[PULL,23/23] target/arm: read access to performance counters from EL0 [PULL,01/23] target/arm: Enable SCTLR_EL1.BT0 for aarch64-linux-user - - 1 - --- 2022-05-05 Peter Maydell New
[PULL,22/23] target/arm: Add isar_feature_{aa64,any}_ras [PULL,01/23] target/arm: Enable SCTLR_EL1.BT0 for aarch64-linux-user - - 1 - --- 2022-05-05 Peter Maydell New
[PULL,21/23] target/arm: Add isar predicates for FEAT_Debugv8p2 [PULL,01/23] target/arm: Enable SCTLR_EL1.BT0 for aarch64-linux-user - - 1 - --- 2022-05-05 Peter Maydell New
[PULL,20/23] target/arm: Remove HOST_BIG_ENDIAN ifdef in add_cpreg_to_hashtable [PULL,01/23] target/arm: Enable SCTLR_EL1.BT0 for aarch64-linux-user - - 1 - --- 2022-05-05 Peter Maydell New
[PULL,19/23] target/arm: Reformat comments in add_cpreg_to_hashtable [PULL,01/23] target/arm: Enable SCTLR_EL1.BT0 for aarch64-linux-user - - 1 - --- 2022-05-05 Peter Maydell New
[PULL,18/23] target/arm: Perform override check early in add_cpreg_to_hashtable [PULL,01/23] target/arm: Enable SCTLR_EL1.BT0 for aarch64-linux-user - - 1 - --- 2022-05-05 Peter Maydell New
[PULL,17/23] target/arm: Hoist isbanked computation in add_cpreg_to_hashtable [PULL,01/23] target/arm: Enable SCTLR_EL1.BT0 for aarch64-linux-user - - 1 - --- 2022-05-05 Peter Maydell New
[PULL,16/23] target/arm: Use bool for is64 and ns in add_cpreg_to_hashtable [PULL,01/23] target/arm: Enable SCTLR_EL1.BT0 for aarch64-linux-user - - 1 - --- 2022-05-05 Peter Maydell New
[PULL,15/23] target/arm: Consolidate cpreg updates in add_cpreg_to_hashtable [PULL,01/23] target/arm: Enable SCTLR_EL1.BT0 for aarch64-linux-user - - 1 - --- 2022-05-05 Peter Maydell New
[PULL,14/23] target/arm: Hoist computation of key in add_cpreg_to_hashtable [PULL,01/23] target/arm: Enable SCTLR_EL1.BT0 for aarch64-linux-user - - 1 - --- 2022-05-05 Peter Maydell New
[PULL,13/23] target/arm: Merge allocation of the cpreg and its name [PULL,01/23] target/arm: Enable SCTLR_EL1.BT0 for aarch64-linux-user - - 1 - --- 2022-05-05 Peter Maydell New
[PULL,12/23] target/arm: Store cpregs key in the hash table directly [PULL,01/23] target/arm: Enable SCTLR_EL1.BT0 for aarch64-linux-user - - 1 - --- 2022-05-05 Peter Maydell New
[PULL,11/23] target/arm: Drop always-true test in define_arm_vh_e2h_redirects_aliases [PULL,01/23] target/arm: Enable SCTLR_EL1.BT0 for aarch64-linux-user - - 1 - --- 2022-05-05 Peter Maydell New
[PULL,10/23] target/arm: Name CPSecureState type [PULL,01/23] target/arm: Enable SCTLR_EL1.BT0 for aarch64-linux-user - - 1 - --- 2022-05-05 Peter Maydell New
[PULL,09/23] target/arm: Name CPState type [PULL,01/23] target/arm: Enable SCTLR_EL1.BT0 for aarch64-linux-user - - 2 - --- 2022-05-05 Peter Maydell New
[PULL,08/23] target/arm: Change cpreg access permissions to enum [PULL,01/23] target/arm: Enable SCTLR_EL1.BT0 for aarch64-linux-user - - 1 - --- 2022-05-05 Peter Maydell New
[PULL,07/23] target/arm: Avoid bare abort() or assert(0) [PULL,01/23] target/arm: Enable SCTLR_EL1.BT0 for aarch64-linux-user - - 1 - --- 2022-05-05 Peter Maydell New
[PULL,06/23] target/arm: Reorg ARMCPRegInfo type field bits [PULL,01/23] target/arm: Enable SCTLR_EL1.BT0 for aarch64-linux-user - - 1 - --- 2022-05-05 Peter Maydell New
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