| Message ID | 20211003141711.3673181-3-f4bug@amsat.org |
|---|---|
| State | New |
| Headers | show |
| Series | target/ppc: Use tcg_constant_* | expand |
On 10/3/21 10:17 AM, Philippe Mathieu-Daudé wrote: > The mask of the Byte-Reverse Halfword opcode is a read-only > constant. We can avoid using a TCG temporary by moving the > mask to the constant pool. > > Signed-off-by: Philippe Mathieu-Daudé<f4bug@amsat.org> > --- > target/ppc/translate.c | 8 +++----- > 1 file changed, 3 insertions(+), 5 deletions(-) Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 193d8e89152..30a60d60973 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -7575,18 +7575,16 @@ static void gen_brw(DisasContext *ctx) /* brh */ static void gen_brh(DisasContext *ctx) { - TCGv_i64 t0 = tcg_temp_new_i64(); + TCGv_i64 mask = tcg_constant_i64(0x00ff00ff00ff00ffull); TCGv_i64 t1 = tcg_temp_new_i64(); TCGv_i64 t2 = tcg_temp_new_i64(); - tcg_gen_movi_i64(t0, 0x00ff00ff00ff00ffull); tcg_gen_shri_i64(t1, cpu_gpr[rS(ctx->opcode)], 8); - tcg_gen_and_i64(t2, t1, t0); - tcg_gen_and_i64(t1, cpu_gpr[rS(ctx->opcode)], t0); + tcg_gen_and_i64(t2, t1, mask); + tcg_gen_and_i64(t1, cpu_gpr[rS(ctx->opcode)], mask); tcg_gen_shli_i64(t1, t1, 8); tcg_gen_or_i64(cpu_gpr[rA(ctx->opcode)], t1, t2); - tcg_temp_free_i64(t0); tcg_temp_free_i64(t1); tcg_temp_free_i64(t2); }
The mask of the Byte-Reverse Halfword opcode is a read-only constant. We can avoid using a TCG temporary by moving the mask to the constant pool. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> --- target/ppc/translate.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-)