diff mbox

[1/4] target-arm: Fix RVBAR_EL1 register encoding

Message ID 1422024563-27096-2-git-send-email-greg.bellows@linaro.org
State New
Headers show

Commit Message

Greg Bellows Jan. 23, 2015, 2:49 p.m. UTC 
Fix the RVBAR_EL1 CP register opc2 encoding from 2 to 1

Signed-off-by: Greg Bellows <greg.bellows@linaro.org>
---
 target-arm/helper.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Peter Maydell Jan. 23, 2015, 2:55 p.m. UTC | #1 
On 23 January 2015 at 14:49, Greg Bellows <greg.bellows@linaro.org> wrote:
> Fix the RVBAR_EL1 CP register opc2 encoding from 2 to 1
>
> Signed-off-by: Greg Bellows <greg.bellows@linaro.org>
> ---
>  target-arm/helper.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

I assume you checked that Linux still boots (ie we're not
accidentally relying on this regdef for RMR_EL1).

thanks
-- PMM
Greg Bellows Jan. 23, 2015, 2:59 p.m. UTC | #2 
On Jan 23, 2015 8:56 AM, "Peter Maydell" <peter.maydell@linaro.org> wrote:
>
> On 23 January 2015 at 14:49, Greg Bellows <greg.bellows@linaro.org> wrote:
> > Fix the RVBAR_EL1 CP register opc2 encoding from 2 to 1
> >
> > Signed-off-by: Greg Bellows <greg.bellows@linaro.org>
> > ---
> >  target-arm/helper.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
>
> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
>
> I assume you checked that Linux still boots (ie we're not
> accidentally relying on this regdef for RMR_EL1).
>
Yeah, I booted linux on virt/a57 without issue.  I'll double check the
reliance on rmr el1.

> thanks
> -- PMM
Peter Maydell Jan. 23, 2015, 3:12 p.m. UTC | #3 
On 23 January 2015 at 14:59, Greg Bellows <greg.bellows@linaro.org> wrote:
>
> On Jan 23, 2015 8:56 AM, "Peter Maydell" <peter.maydell@linaro.org> wrote:
>> I assume you checked that Linux still boots (ie we're not
>> accidentally relying on this regdef for RMR_EL1).
>>
> Yeah, I booted linux on virt/a57 without issue.  I'll double check the
> reliance on rmr el1.

If it booted we're fine.

-- PMM
diff mbox

Patch

diff --git a/target-arm/helper.c b/target-arm/helper.c
index 1a5e067..c9b1c08 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -3055,7 +3055,7 @@  void register_cp_regs_for_features(ARMCPU *cpu)
         };
         ARMCPRegInfo rvbar = {
             .name = "RVBAR_EL1", .state = ARM_CP_STATE_AA64,
-            .opc0 = 3, .opc1 = 0, .crn = 12, .crm = 0, .opc2 = 2,
+            .opc0 = 3, .opc1 = 0, .crn = 12, .crm = 0, .opc2 = 1,
             .type = ARM_CP_CONST, .access = PL1_R, .resetvalue = cpu->rvbar
         };
         define_one_arm_cp_reg(cpu, &rvbar);