Toggle navigation
Patchwork
QEMU Development
Patches
Bundles
About this project
Login
Register
Mail settings
Show patches with
: Submitter =
Frank Chang
| State =
Action Required
| 1060 patches
Series
Submitter
State
any
Action Required
New
Under Review
Accepted
Rejected
RFC
Not Applicable
Changes Requested
Awaiting Upstream
Superseded
Deferred
Needs Review / ACK
Handled Elsewhere
Search
Archived
No
Yes
Both
Delegate
------
Nobody
jgarzik
arnd
ymano
smfrench
jlayton
tseliot
ogasawara
amitk
awhitcroft
mst
dayangkun
jwboyer
jwboyer
colinking
colinking
azummo
dwmw2
rtg
sconklin
smb
aliguori
bradf
galak
galak
demarchi
ms
bhundven
chbs
kengyu
kadlec
pdp
regit
jabk
laforge
laforge
tonyb
sfr
alai
zecke
zecke
__damien__
luka
luka
prafulla@marvell.com
cyrus
PeterHuewe
kiho
jow
jow
ypwong
nico
dedeckeh
dedeckeh
yousong
yousong
tomcwarren
mb
mrchuck
vineetg76
computersforpeace
Noltari
Noltari
patrick_delaunay
ee07b291
ldir
ldir
stefanct
zhouhan
carldani
blp
ffainelli
ffainelli
regXboi
bbrezillon
pravin
mkp
jpettit
mkresin
mkresin
thess
thess
fbarrat
fbarrat
phil
linville
jesse
tjaalton
esben
abrodkin
abrodkin
diproiettod
tbot
stephenfin
vriera
darball1
sammj
ajd
jogo
jogo
bhelgaas
blogic
blogic
tagr
tagr
tagr
oohal
russellb
ptomsich
agraf
joestringer
davem
davem
davem
mwalle
naveen
pchotard
pepe2k
pepe2k
arj
arj
andmur01
amitay
matttbe
pabeni
istokes
aparcar
Ansuel
goliath
martineau
tytso
danielschwierzeck
tpetazzoni
mariosix
dcaratti
ovsrobot
ovsrobot
aserdean
XiaoYang
hs
khem
mkorpershoek
marex
liwang
apritzel
danielhb
groug
npiggin
mmichelson
pareddja
robimarko
atishp
netdrv
mkubecek
stintel
stintel
jkicinski
cpitchen
maximeh
dsa
jstancek
pm215
bpf
jonhunter
shettyg
lorpie01
acelan
wigyori
wigyori
apopple
dja
alexhung
lynxis
lynxis
brgl
brgl
peda
akodanev
narmstrong
981213
0andriy
chunkeey
snowpatch_ozlabs
snowpatch_ozlabs
snowpatch_ozlabs
aivanov
atishp04
shemminger
blocktrron
monstr
vigneshr
mraynal
stewart
stewart
jacmet
freenix
kabel
rfried
jagan
horms
arbab
wsa
Jaehoon
rsalvaterra
adrianschmutzler
hegdevasant
hegdevasant
ehristev
bmeng
ukleinek
ukleinek
ag
xypron
metan
rmilecki
rmilecki
akumar
ivanhu
sjg
prom
kevery
abelloni
trini
apconole
svanheule
chleroy
Hauke
Hauke
legoater
legoater
legoater
rw
rw
wbx
pablo
pablo
bjonglez
ynezz
pevik
aik
xback
xback
richiejp
dangole
dangole
sbabic
sbabic
forty
next_ghost
anuppatel
anuppatel
echaudron
acer
benh
rgrimm
pratyush
segher
passgat
jms
jms
jms
festevam
mans0n
ruscur
Andes
linusw
linusw
jmberg
ymorin
ymorin
numans
jk
jk
jk
jk
xuyang
kubu
matthias_bgg
tambarus
pbrobinson
imaximets
apalos
dceara
strlen
strlen
spectrum
cazzacarna
neocturne
aldot
TIENFONG
mpe
ktraynor
arnout
calebccff
anguy11
robh
nbd
nbd
paulus
stroese
jm
Apply
«
1
2
3
4
…
10
11
»
Patch
Series
A/F/R/T
S/W/F
Date
Submitter
Delegate
State
hw/intc: Update APLIC IDC after claiming iforce register
hw/intc: Update APLIC IDC after claiming iforce register
- - 2 -
-
-
-
2024-03-21
Frank Chang
New
target/riscv: Add missing include guard in pmu.h
target/riscv: Add missing include guard in pmu.h
- 1 4 -
-
-
-
2024-02-20
Frank Chang
New
[v2] target/riscv: Remove privileged spec version restriction for RVV
[v2] target/riscv: Remove privileged spec version restriction for RVV
1 - 2 -
-
-
-
2023-02-08
Frank Chang
New
target/riscv: Remove .min_priv_ver restriction from RVV CSRs
target/riscv: Remove .min_priv_ver restriction from RVV CSRs
- - 2 -
-
-
-
2023-02-07
Frank Chang
New
target/riscv: Check the correct exception cause in vector GDB stub
target/riscv: Check the correct exception cause in vector GDB stub
- - 4 -
-
-
-
2022-09-18
Frank Chang
New
[9/9] target/riscv: debug: Add initial support of type 6 trigger
Improve RISC-V Debug support
- - 1 -
-
-
-
2022-06-10
Frank Chang
New
[8/9] target/riscv: debug: Return 0 if previous value written to tselect >= number of triggers
Improve RISC-V Debug support
- - - -
-
-
-
2022-06-10
Frank Chang
New
[7/9] target/riscv: debug: Check VU/VS modes for type 2 trigger
Improve RISC-V Debug support
- - 1 -
-
-
-
2022-06-10
Frank Chang
New
[6/9] target/riscv: debug: Create common trigger actions function
Improve RISC-V Debug support
- - - -
-
-
-
2022-06-10
Frank Chang
New
[5/9] target/riscv: debug: Introduce tinfo CSR
Improve RISC-V Debug support
- - 1 -
-
-
-
2022-06-10
Frank Chang
New
[4/9] target/riscv: debug: Restrict the range of tselect value can be written
Improve RISC-V Debug support
- - 1 -
-
-
-
2022-06-10
Frank Chang
New
[3/9] target/riscv: debug: Introduce tdata1, tdata2, and tdata3 CSRs
Improve RISC-V Debug support
- - - -
-
-
-
2022-06-10
Frank Chang
New
[2/9] target/riscv: debug: Introduce build_tdata1() to build tdata1 register content
Improve RISC-V Debug support
- - 1 -
-
-
-
2022-06-10
Frank Chang
New
[1/9] target/riscv: debug: Determine the trigger type from tdata1.type
Improve RISC-V Debug support
- - 1 -
-
-
-
2022-06-10
Frank Chang
New
[RESEND,v2] target/riscv: Fix typo of mimpid cpu option
[RESEND,v2] target/riscv: Fix typo of mimpid cpu option
- 1 1 -
-
-
-
2022-05-23
Frank Chang
New
[v2] target/riscv: Fix typo of mimpid cpu option
[v2] target/riscv: Fix typo of mimpid cpu option
- 1 - -
-
-
-
2022-05-23
Frank Chang
New
target/riscv: Fix typo of mimpid cpu option
target/riscv: Fix typo of mimpid cpu option
- - 1 -
-
-
-
2022-05-20
Frank Chang
New
hw/dma: Add Xilinx AXI CDMA
hw/dma: Add Xilinx AXI CDMA
- - 1 -
-
-
-
2022-04-28
Frank Chang
New
[v3] target/riscv: Support configuarable marchid, mvendorid, mipid CSR values
[v3] target/riscv: Support configuarable marchid, mvendorid, mipid CSR values
- - 3 -
-
-
-
2022-04-22
Frank Chang
New
[v2] target/riscv: Support configuarable marchid, mvendorid, mipid CSR values
[v2] target/riscv: Support configuarable marchid, mvendorid, mipid CSR values
- - 3 -
-
-
-
2022-04-20
Frank Chang
New
[v4,4/4] hw/intc: riscv_aclint: Add reset function of ACLINT devices
Support ACLINT 32/64-bit mtimecmp/mtime read/write accesses
- - 2 -
-
-
-
2022-04-20
Frank Chang
New
[v4,3/4] hw/intc: Make RISC-V ACLINT mtime MMIO register writable
Support ACLINT 32/64-bit mtimecmp/mtime read/write accesses
- - 2 -
-
-
-
2022-04-20
Frank Chang
New
[v4,2/4] hw/intc: Support 32/64-bit mtimecmp and mtime accesses in RISC-V ACLINT
Support ACLINT 32/64-bit mtimecmp/mtime read/write accesses
- - 2 -
-
-
-
2022-04-20
Frank Chang
New
[v4,1/4] hw/intc: Add .impl.[min|max]_access_size declaration in RISC-V ACLINT
Support ACLINT 32/64-bit mtimecmp/mtime read/write accesses
- - 2 -
-
-
-
2022-04-20
Frank Chang
New
[v3,4/4] hw/intc: riscv_aclint: Add reset function of ACLINT devices
Support ACLINT 32/64-bit mtimecmp/mtime read/write accesses
- - 2 -
-
-
-
2022-04-19
Frank Chang
New
[v3,3/4] hw/intc: Make RISC-V ACLINT mtime MMIO register writable
Support ACLINT 32/64-bit mtimecmp/mtime read/write accesses
- - 2 -
-
-
-
2022-04-19
Frank Chang
New
[v3,2/4] hw/intc: Support 32/64-bit mtimecmp and mtime accesses in RISC-V ACLINT
Support ACLINT 32/64-bit mtimecmp/mtime read/write accesses
- - 2 -
-
-
-
2022-04-19
Frank Chang
New
[v3,1/4] hw/intc: Add .impl.[min|max]_access_size declaration in RISC-V ACLINT
Support ACLINT 32/64-bit mtimecmp/mtime read/write accesses
- - 2 -
-
-
-
2022-04-19
Frank Chang
New
target/riscv: Support configuarable marchid, mvendorid, mipid CSR values
target/riscv: Support configuarable marchid, mvendorid, mipid CSR values
- - 2 -
-
-
-
2022-04-15
Frank Chang
New
[RFC,v2,3/3] hw/intc: Make RISC-V ACLINT mtime MMIO register writable
Support ACLINT 32/64-bit mtimecmp/mtime read/write accesses
- - - -
-
-
-
2022-02-10
Frank Chang
New
[RFC,v2,2/3] hw/intc: Support 32/64-bit mtimecmp and mtime accesses in RISC-V ACLINT
Support ACLINT 32/64-bit mtimecmp/mtime read/write accesses
- - 1 -
-
-
-
2022-02-10
Frank Chang
New
[RFC,v2,1/3] hw/intc: Add .impl.[min|max]_access_size declaration in RISC-V ACLINT
Support ACLINT 32/64-bit mtimecmp/mtime read/write accesses
- - 1 -
-
-
-
2022-02-10
Frank Chang
New
[RFC] hw/intc: Make RISC-V ACLINT mtime MMIO register writable
[RFC] hw/intc: Make RISC-V ACLINT mtime MMIO register writable
- - - -
-
-
-
2022-01-26
Frank Chang
New
hw/sd: Correct CMD58's R3 response "in idle state" bit in SPI-mode
hw/sd: Correct CMD58's R3 response "in idle state" bit in SPI-mode
- - - -
-
-
-
2022-01-26
Frank Chang
New
hw/sd: Correct card status clear conditions in SPI-mode
hw/sd: Correct card status clear conditions in SPI-mode
- - - -
-
-
-
2022-01-24
Frank Chang
New
hw/sd: Correct the CURRENT_STATE bits in SPI-mode response
hw/sd: Correct the CURRENT_STATE bits in SPI-mode response
- - - -
-
-
-
2022-01-18
Frank Chang
New
[v2,17/17] target/riscv: rvv-1.0: Allow Zve32f extension to be turned on
Add RISC-V RVV Zve32f and Zve64f extensions
- - 1 -
-
-
-
2022-01-18
Frank Chang
New
[v2,16/17] target/riscv: rvv-1.0: Add Zve32f support for narrowing type-convert insns
Add RISC-V RVV Zve32f and Zve64f extensions
- - 1 -
-
-
-
2022-01-18
Frank Chang
New
[v2,15/17] target/riscv: rvv-1.0: Add Zve32f support for widening type-convert insns
Add RISC-V RVV Zve32f and Zve64f extensions
- - 1 -
-
-
-
2022-01-18
Frank Chang
New
[v2,14/17] target/riscv: rvv-1.0: Add Zve32f support for single-width fp reduction insns
Add RISC-V RVV Zve32f and Zve64f extensions
- - 1 -
-
-
-
2022-01-18
Frank Chang
New
[v2,13/17] target/riscv: rvv-1.0: Add Zve32f support for scalar fp insns
Add RISC-V RVV Zve32f and Zve64f extensions
- - 1 -
-
-
-
2022-01-18
Frank Chang
New
[v2,12/17] target/riscv: rvv-1.0: Add Zve32f support for configuration insns
Add RISC-V RVV Zve32f and Zve64f extensions
- - 1 -
-
-
-
2022-01-18
Frank Chang
New
[v2,11/17] target/riscv: rvv-1.0: Add Zve32f extension into RISC-V
Add RISC-V RVV Zve32f and Zve64f extensions
- - 1 -
-
-
-
2022-01-18
Frank Chang
New
[v2,10/17] target/riscv: rvv-1.0: Allow Zve64f extension to be turned on
Add RISC-V RVV Zve32f and Zve64f extensions
- - 1 -
-
-
-
2022-01-18
Frank Chang
New
[v2,09/17] target/riscv: rvv-1.0: Add Zve64f support for narrowing type-convert insns
Add RISC-V RVV Zve32f and Zve64f extensions
- - 1 -
-
-
-
2022-01-18
Frank Chang
New
[v2,08/17] target/riscv: rvv-1.0: Add Zve64f support for widening type-convert insns
Add RISC-V RVV Zve32f and Zve64f extensions
- - 1 -
-
-
-
2022-01-18
Frank Chang
New
[v2,07/17] target/riscv: rvv-1.0: Add Zve64f support for single-width fp reduction insns
Add RISC-V RVV Zve32f and Zve64f extensions
- - 1 -
-
-
-
2022-01-18
Frank Chang
New
[v2,06/17] target/riscv: rvv-1.0: Add Zve64f support for scalar fp insns
Add RISC-V RVV Zve32f and Zve64f extensions
- - 1 -
-
-
-
2022-01-18
Frank Chang
New
[v2,05/17] target/riscv: rvv-1.0: Add Zve64f support for vsmul.vv and vsmul.vx insns
Add RISC-V RVV Zve32f and Zve64f extensions
- - 1 -
-
-
-
2022-01-18
Frank Chang
New
[v2,04/17] target/riscv: rvv-1.0: Add Zve64f support for vmulh variant insns
Add RISC-V RVV Zve32f and Zve64f extensions
- - 1 -
-
-
-
2022-01-18
Frank Chang
New
[v2,03/17] target/riscv: rvv-1.0: Add Zve64f support for load and store insns
Add RISC-V RVV Zve32f and Zve64f extensions
- - 1 -
-
-
-
2022-01-18
Frank Chang
New
[v2,02/17] target/riscv: rvv-1.0: Add Zve64f support for configuration insns
Add RISC-V RVV Zve32f and Zve64f extensions
- - 1 -
-
-
-
2022-01-18
Frank Chang
New
[v2,01/17] target/riscv: rvv-1.0: Add Zve64f extension into RISC-V
Add RISC-V RVV Zve32f and Zve64f extensions
- - 1 -
-
-
-
2022-01-18
Frank Chang
New
[v2,3/3] target/riscv: rvv-1.0: Call the correct RVF/RVD check function for narrowing fp/int type-c…
Fix RVV calling incorrect RFV/RVD check functions bug
1 - - -
-
-
-
2022-01-05
Frank Chang
New
[v2,2/3] target/riscv: rvv-1.0: Call the correct RVF/RVD check function for widening fp/int type-co…
Fix RVV calling incorrect RFV/RVD check functions bug
1 - - -
-
-
-
2022-01-05
Frank Chang
New
[v2,1/3] target/riscv: rvv-1.0: Call the correct RVF/RVD check function for widening fp insns
Fix RVV calling incorrect RFV/RVD check functions bug
1 - - -
-
-
-
2022-01-05
Frank Chang
New
[17/17] target/riscv: rvv-1.0: Allow Zve32f extension to be turned on
Add RISC-V RVV Zve32f and Zve64f extensions
- - 1 -
-
-
-
2021-12-29
Frank Chang
New
[16/17] target/riscv: rvv-1.0: Add Zve32f support for narrowing type-convert insns
Add RISC-V RVV Zve32f and Zve64f extensions
- - 1 -
-
-
-
2021-12-29
Frank Chang
New
[15/17] target/riscv: rvv-1.0: Add Zve32f support for widening type-convert insns
Add RISC-V RVV Zve32f and Zve64f extensions
- - 1 -
-
-
-
2021-12-29
Frank Chang
New
[14/17] target/riscv: rvv-1.0: Add Zve32f support for single-width fp reduction insns
Add RISC-V RVV Zve32f and Zve64f extensions
- - 1 -
-
-
-
2021-12-29
Frank Chang
New
[13/17] target/riscv: rvv-1.0: Add Zve32f support for scalar fp insns
Add RISC-V RVV Zve32f and Zve64f extensions
- - 1 -
-
-
-
2021-12-29
Frank Chang
New
[12/17] target/riscv: rvv-1.0: Add Zve32f support for configuration insns
Add RISC-V RVV Zve32f and Zve64f extensions
- - 1 -
-
-
-
2021-12-29
Frank Chang
New
[11/17] target/riscv: rvv-1.0: Add Zve32f extension into RISC-V
Add RISC-V RVV Zve32f and Zve64f extensions
- - 1 -
-
-
-
2021-12-29
Frank Chang
New
[10/17] target/riscv: rvv-1.0: Allow Zve64f extension to be turned on
Add RISC-V RVV Zve32f and Zve64f extensions
- - 1 -
-
-
-
2021-12-29
Frank Chang
New
[09/17] target/riscv: rvv-1.0: Add Zve64f support for narrowing type-convert insns
Add RISC-V RVV Zve32f and Zve64f extensions
- - 1 -
-
-
-
2021-12-29
Frank Chang
New
[08/17] target/riscv: rvv-1.0: Add Zve64f support for widening type-convert insns
Add RISC-V RVV Zve32f and Zve64f extensions
- - 1 -
-
-
-
2021-12-29
Frank Chang
New
[07/17] target/riscv: rvv-1.0: Add Zve64f support for single-width fp reduction insns
Add RISC-V RVV Zve32f and Zve64f extensions
- - 1 -
-
-
-
2021-12-29
Frank Chang
New
[06/17] target/riscv: rvv-1.0: Add Zve64f support for scalar fp insns
Add RISC-V RVV Zve32f and Zve64f extensions
- - 1 -
-
-
-
2021-12-29
Frank Chang
New
[05/17] target/riscv: rvv-1.0: Add Zve64f support for vsmul.vv and vsmul.vx insns
Add RISC-V RVV Zve32f and Zve64f extensions
- - 1 -
-
-
-
2021-12-29
Frank Chang
New
[04/17] target/riscv: rvv-1.0: Add Zve64f support for vmulh variant insns
Add RISC-V RVV Zve32f and Zve64f extensions
- - 1 -
-
-
-
2021-12-29
Frank Chang
New
[03/17] target/riscv: rvv-1.0: Add Zve64f support for load and store insns
Add RISC-V RVV Zve32f and Zve64f extensions
- - - -
-
-
-
2021-12-29
Frank Chang
New
[02/17] target/riscv: rvv-1.0: Add Zve64f support for configuration insns
Add RISC-V RVV Zve32f and Zve64f extensions
- - 1 -
-
-
-
2021-12-29
Frank Chang
New
[01/17] target/riscv: rvv-1.0: Add Zve64f extension into RISC-V
Add RISC-V RVV Zve32f and Zve64f extensions
- - 1 -
-
-
-
2021-12-29
Frank Chang
New
[3/3] target/riscv: rvv-1.0: Call the correct RVF/RVD check funtion for narrowing fp/int type-conve…
Fix RVV calling incorrect RFV/RVD check functions bug
- - - -
-
-
-
2021-12-29
Frank Chang
New
[2/3] target/riscv: rvv-1.0: Call the correct RVF/RVD check funtion for widening fp/int type-conver…
Fix RVV calling incorrect RFV/RVD check functions bug
- - - -
-
-
-
2021-12-29
Frank Chang
New
[1/3] target/riscv: rvv-1.0: Call the correct RVF/RVD check funtion for widening fp insns
Fix RVV calling incorrect RFV/RVD check functions bug
- - - -
-
-
-
2021-12-29
Frank Chang
New
[v2] hw/sd: Add SDHC support for SD card SPI-mode
[v2] hw/sd: Add SDHC support for SD card SPI-mode
- - 2 -
-
-
-
2021-12-28
Frank Chang
New
hw/sd: Add SDHC support for SD card SPI-mode
hw/sd: Add SDHC support for SD card SPI-mode
- - 2 -
-
-
-
2021-12-28
Frank Chang
New
[v11,77/77] target/riscv: rvv-1.0: Add ELEN checks for widening and narrowing instructions
support vector extension v1.0
1 - - -
-
-
-
2021-12-10
Frank Chang
New
[v11,76/77] target/riscv: rvv-1.0: update opivv_vadc_check() comment
support vector extension v1.0
- - 1 -
-
-
-
2021-12-10
Frank Chang
New
[v11,75/77] target/riscv: rvv-1.0: rename vmandnot.mm and vmornot.mm to vmandn.mm and vmorn.mm
support vector extension v1.0
- - 1 -
-
-
-
2021-12-10
Frank Chang
New
[v11,74/77] target/riscv: rvv-1.0: add vector unit-stride mask load/store insns
support vector extension v1.0
1 - - -
-
-
-
2021-12-10
Frank Chang
New
[v11,73/77] target/riscv: rvv-1.0: add evl parameter to vext_ldst_us()
support vector extension v1.0
- - 1 -
-
-
-
2021-12-10
Frank Chang
New
[v11,72/77] target/riscv: rvv-1.0: add vsetivli instruction
support vector extension v1.0
- - 1 -
-
-
-
2021-12-10
Frank Chang
New
[v11,71/77] target/riscv: rvv-1.0: rename r2_zimm to r2_zimm11
support vector extension v1.0
- - 1 -
-
-
-
2021-12-10
Frank Chang
New
[v11,70/77] target/riscv: rvv-1.0: floating-point reciprocal estimate instruction
support vector extension v1.0
1 - - -
-
-
-
2021-12-10
Frank Chang
New
[v11,69/77] target/riscv: rvv-1.0: floating-point reciprocal square-root estimate instruction
support vector extension v1.0
1 - - -
-
-
-
2021-12-10
Frank Chang
New
[v11,68/77] target/riscv: gdb: support vector registers for rv64 & rv32
support vector extension v1.0
1 - - -
-
-
-
2021-12-10
Frank Chang
New
[v11,67/77] target/riscv: rvv-1.0: trigger illegal instruction exception if frm is not valid
support vector extension v1.0
1 - - -
-
-
-
2021-12-10
Frank Chang
New
[v11,66/77] target/riscv: rvv-1.0: implement vstart CSR
support vector extension v1.0
- - 1 -
-
-
-
2021-12-10
Frank Chang
New
[v11,65/77] target/riscv: rvv-1.0: relax RV_VLEN_MAX to 1024-bits
support vector extension v1.0
- - 1 -
-
-
-
2021-12-10
Frank Chang
New
[v11,64/77] target/riscv: rvv-1.0: narrowing floating-point/integer type-convert
support vector extension v1.0
1 - - -
-
-
-
2021-12-10
Frank Chang
New
[v11,63/77] target/riscv: add "set round to odd" rounding mode helper function
support vector extension v1.0
1 - - -
-
-
-
2021-12-10
Frank Chang
New
[v11,62/77] target/riscv: rvv-1.0: widening floating-point/integer type-convert
support vector extension v1.0
1 - - -
-
-
-
2021-12-10
Frank Chang
New
[v11,61/77] target/riscv: rvv-1.0: floating-point/integer type-convert instructions
support vector extension v1.0
- - 1 -
-
-
-
2021-12-10
Frank Chang
New
[v11,60/77] target/riscv: introduce floating-point rounding mode enum
support vector extension v1.0
- - 1 -
-
-
-
2021-12-10
Frank Chang
New
[v11,59/77] target/riscv: rvv-1.0: floating-point min/max instructions
support vector extension v1.0
- - 1 -
-
-
-
2021-12-10
Frank Chang
New
[v11,58/77] target/riscv: rvv-1.0: remove integer extract instruction
support vector extension v1.0
- - 1 -
-
-
-
2021-12-10
Frank Chang
New
[v11,57/77] target/riscv: rvv-1.0: remove vmford.vv and vmford.vf
support vector extension v1.0
- - 1 -
-
-
-
2021-12-10
Frank Chang
New
[v11,56/77] target/riscv: rvv-1.0: remove widening saturating scaled multiply-add
support vector extension v1.0
- - 1 -
-
-
-
2021-12-10
Frank Chang
New
«
1
2
3
4
…
10
11
»