diff mbox series

[v3,3/6] lib: utils/irqchip: Add compatible string for Andestech NCEPLIC100

Message ID 20221130220825.193693-4-prabhakar.mahadev-lad.rj@bp.renesas.com
State Superseded
Headers show
Series Add support for Renesas RZ/Five SoC | expand

Commit Message

Lad, Prabhakar Nov. 30, 2022, 10:08 p.m. UTC
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Add compatible string for Andestech NCEPLIC100 found on Renesas RZ/Five SoC
which is equipped with AX45MP AndesCore.

While at it drop the comma after the sentinel as it does not make sense to
have a comma after a sentinel, as any new elements must be added before the
sentinel.

dts example (Single-core AX45MP):

    soc: soc {
          ....
          plic: interrupt-controller@12c00000 {
              compatible = "renesas,r9a07g043-plic", "andestech,nceplic100";
              #interrupt-cells = <2>;
              #address-cells = <0>;
              riscv,ndev = <511>;
              interrupt-controller;
              reg = <0x0 0x12c00000 0 0x400000>;
              clocks = <&cpg CPG_MOD R9A07G043_NCEPLIC_ACLK>;
              power-domains = <&cpg>;
              resets = <&cpg R9A07G043_NCEPLIC_ARESETN>;
              interrupts-extended = <&cpu0_intc 11 &cpu0_intc 9>;
          };
          ....
    };

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
---
v2->v3
* Included RB tags

RFC->v2
* No change

DT binding [0]
[0] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/tree/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml?h=next-20221111#n56
---
 lib/utils/irqchip/fdt_irqchip_plic.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

Comments

Biju Das Dec. 1, 2022, 8:29 a.m. UTC | #1
Hi Prabhakar,

> Subject: [PATCH v3 3/6] lib: utils/irqchip: Add compatible string for
> Andestech NCEPLIC100
> 
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> 
> Add compatible string for Andestech NCEPLIC100 found on Renesas RZ/Five
> SoC which is equipped with AX45MP AndesCore.
> 
> While at it drop the comma after the sentinel as it does not make sense
> to have a comma after a sentinel, as any new elements must be added
> before the sentinel.
> 
> dts example (Single-core AX45MP):
> 
>     soc: soc {
>           ....
>           plic: interrupt-controller@12c00000 {
>               compatible = "renesas,r9a07g043-plic",
> "andestech,nceplic100";
>               #interrupt-cells = <2>;
>               #address-cells = <0>;
>               riscv,ndev = <511>;
>               interrupt-controller;
>               reg = <0x0 0x12c00000 0 0x400000>;
>               clocks = <&cpg CPG_MOD R9A07G043_NCEPLIC_ACLK>;
>               power-domains = <&cpg>;
>               resets = <&cpg R9A07G043_NCEPLIC_ARESETN>;
>               interrupts-extended = <&cpu0_intc 11 &cpu0_intc 9>;
>           };
>           ....
>     };
> 
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Reviewed-by: Anup Patel <anup@brainfault.org>
> Reviewed-by: Bin Meng <bmeng@tinylab.org>
> ---
> v2->v3
> * Included RB tags
> 
> RFC->v2
> * No change
> 
> DT binding [0]

> ---
>  lib/utils/irqchip/fdt_irqchip_plic.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/lib/utils/irqchip/fdt_irqchip_plic.c
> b/lib/utils/irqchip/fdt_irqchip_plic.c
> index a6e185c..83d091a 100644
> --- a/lib/utils/irqchip/fdt_irqchip_plic.c
> +++ b/lib/utils/irqchip/fdt_irqchip_plic.c
> @@ -163,7 +163,8 @@ static const struct fdt_match irqchip_plic_match[] =
> {
>  	{ .compatible = "sifive,plic-1.0.0" },
>  	{ .compatible = "thead,c900-plic",
>  	  .data = thead_plic_plat_init },
> -	{ },
> +	{ .compatible = "andestech,nceplic100" },
> +	{ /* sentinel */ }

Maybe sort alphabetically.

Cheers,
Biju
>  };
> 
>  struct fdt_irqchip fdt_irqchip_plic = {
> --
> 2.17.1
Lad, Prabhakar Dec. 1, 2022, 9:06 a.m. UTC | #2
Hi Biju,

Thank you for the review.

On Thu, Dec 1, 2022 at 8:29 AM Biju Das <biju.das.jz@bp.renesas.com> wrote:
>
> Hi Prabhakar,
>
> > Subject: [PATCH v3 3/6] lib: utils/irqchip: Add compatible string for
> > Andestech NCEPLIC100
> >
<snip>
> > index a6e185c..83d091a 100644
> > --- a/lib/utils/irqchip/fdt_irqchip_plic.c
> > +++ b/lib/utils/irqchip/fdt_irqchip_plic.c
> > @@ -163,7 +163,8 @@ static const struct fdt_match irqchip_plic_match[] =
> > {
> >       { .compatible = "sifive,plic-1.0.0" },
> >       { .compatible = "thead,c900-plic",
> >         .data = thead_plic_plat_init },
> > -     { },
> > +     { .compatible = "andestech,nceplic100" },
> > +     { /* sentinel */ }
>
> Maybe sort alphabetically.
>
Ok.

Cheers,
Prabhakar
diff mbox series

Patch

diff --git a/lib/utils/irqchip/fdt_irqchip_plic.c b/lib/utils/irqchip/fdt_irqchip_plic.c
index a6e185c..83d091a 100644
--- a/lib/utils/irqchip/fdt_irqchip_plic.c
+++ b/lib/utils/irqchip/fdt_irqchip_plic.c
@@ -163,7 +163,8 @@  static const struct fdt_match irqchip_plic_match[] = {
 	{ .compatible = "sifive,plic-1.0.0" },
 	{ .compatible = "thead,c900-plic",
 	  .data = thead_plic_plat_init },
-	{ },
+	{ .compatible = "andestech,nceplic100" },
+	{ /* sentinel */ }
 };
 
 struct fdt_irqchip fdt_irqchip_plic = {