diff mbox series

[v2,2/2] powerpc/perf: Check pmus_inuse flag in perf_event_print_debug()

Message ID 20200218125631.19692-2-maddy@linux.ibm.com (mailing list archive)
State New
Headers show
Series [1/2] powerpc/perf: Add mtmmcr0(FC) after ppc_set_pmu_inuse(1) | expand


Context Check Description
snowpatch_ozlabs/apply_patch success Successfully applied on branch powerpc/merge (a5bc6e124219546a81ce334dc9b16483d55e9abf)
snowpatch_ozlabs/build-ppc64le success Build succeeded
snowpatch_ozlabs/build-ppc64be success Build succeeded
snowpatch_ozlabs/build-ppc64e success Build succeeded
snowpatch_ozlabs/build-pmac32 success Build succeeded
snowpatch_ozlabs/checkpatch success total: 0 errors, 0 warnings, 0 checks, 41 lines checked
snowpatch_ozlabs/needsstable success Patch has no Fixes tags

Commit Message

Madhavan Srinivasan Feb. 18, 2020, 12:56 p.m. UTC
pmu_inuse flag is part of lppaca struct which notifies the hypervisor
whether guest/partition is using PMUs. This provides a hint for
save/restore of PMU registers. Currently perf_event_print_debug()
does not check for pmu_inuse flag and it is not safe to use it to

Patch adds two things here. 1) An inline ppc_get_pmu_inuse() to get
the pmu_inuse value and 2)check in perf_event_print_debug() before
dumping the PMU SPRs.

ppc_get_pmu_inuse() is based on ppc_set_pmu_inuse() and includes same
CONFIG_ checks.

Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com>
Changelog v1:
- Fixed pmac32_deconfig build break 
- Fixed errors reported by checkpatch.pl

 arch/powerpc/include/asm/pmc.h  | 15 +++++++++++++++
 arch/powerpc/perf/core-book3s.c |  9 +++++++++
 2 files changed, 24 insertions(+)
diff mbox series


diff --git a/arch/powerpc/include/asm/pmc.h b/arch/powerpc/include/asm/pmc.h
index c6bbe9778d3c..600c133b49cd 100644
--- a/arch/powerpc/include/asm/pmc.h
+++ b/arch/powerpc/include/asm/pmc.h
@@ -34,11 +34,26 @@  static inline void ppc_set_pmu_inuse(int inuse)
+static inline u8 ppc_get_pmu_inuse(void)
+	if (firmware_has_feature(FW_FEATURE_LPAR)) {
+		return get_lppaca()->pmcregs_in_use;
+	}
+	return get_paca()->pmcregs_in_use;
 extern void power4_enable_pmcs(void);
 #else /* CONFIG_PPC64 */
 static inline void ppc_set_pmu_inuse(int inuse) { }
+static inline u8 ppc_get_pmu_inuse(void) { return 0; }
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
index 6e35bf9ff80a..61d4a290b336 100644
--- a/arch/powerpc/perf/core-book3s.c
+++ b/arch/powerpc/perf/core-book3s.c
@@ -808,6 +808,15 @@  void perf_event_print_debug(void)
 	if (!ppmu->n_counter)
+	/*
+	 * Check pmu_inuse flag. As per PAPR spec, hypersivor
+	 * will save/restore the PMU regs only if pmu_inuse is
+	 * set. If its not enable, values dumped from these SPRs
+	 * may not be valid or useful.
+	 */
+	if (!ppc_get_pmu_inuse())
+		return;
 	pr_info("CPU: %d PMU registers, ppmu = %s n_counters = %d",