| Message ID | 20200218125631.19692-1-maddy@linux.ibm.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | [1/2] powerpc/perf: Add mtmmcr0(FC) after ppc_set_pmu_inuse(1) | expand |
| Context | Check | Description |
|---|---|---|
| snowpatch_ozlabs/apply_patch | success | Successfully applied on branch powerpc/merge (a5bc6e124219546a81ce334dc9b16483d55e9abf) |
| snowpatch_ozlabs/checkpatch | success | total: 0 errors, 0 warnings, 0 checks, 7 lines checked |
| snowpatch_ozlabs/needsstable | success | Patch has no Fixes tags |
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c index a934e8c8a9b8..6e35bf9ff80a 100644 --- a/arch/powerpc/perf/core-book3s.c +++ b/arch/powerpc/perf/core-book3s.c @@ -1343,6 +1343,7 @@ static void power_pmu_enable(struct pmu *pmu) * Then unfreeze the events. */ ppc_set_pmu_inuse(1); + mtspr(SPRN_MMCR0, MMCR0_FC); mtspr(SPRN_MMCRA, cpuhw->mmcr[2] & ~MMCRA_SAMPLE_ENABLE); mtspr(SPRN_MMCR1, cpuhw->mmcr[1]); mtspr(SPRN_MMCR0, (cpuhw->mmcr[0] & ~(MMCR0_PMC1CE | MMCR0_PMCjCE))
pmu_inuse flag is part of lppaca struct which notifies the hypervisor whether guest/partition is using PMUs. This provides a hint incase of save/restore of PMU registers. And in power_pmu_enable(), linux sets the pmu_inuse flag and then updates the PMU registers. Current sequence in power_pmu_enable() is 1) update pmc_inuse flag 2)update MMCRA, MMCR1, MMCR0 and so on. But with this sequence, there is a window where when updating MMCRA, hypersior could load stale value to MMCR0 which could cause a PMI exception. Patch add a mtmmcr0 with freeze counter bit set right after updating the pmu_inuse flag to avoid any overflow scenarios. Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com> --- arch/powerpc/perf/core-book3s.c | 1 + 1 file changed, 1 insertion(+)