diff mbox

clocksource: tegra: enable arch_timer

Message ID 1364988750-25058-1-git-send-email-josephl@nvidia.com
State Rejected, archived
Headers show

Commit Message

Joseph Lo April 3, 2013, 11:32 a.m. UTC
Architected timer is the local timer for Cortex-A15. Adding the support
for Tegra.

Cc: John Stultz <john.stultz@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
---
 drivers/clocksource/tegra20_timer.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

Comments

Rob Herring April 3, 2013, 1:28 p.m. UTC | #1
On 04/03/2013 06:32 AM, Joseph Lo wrote:
> Architected timer is the local timer for Cortex-A15. Adding the support
> for Tegra.
> 
> Cc: John Stultz <john.stultz@linaro.org>
> Cc: Thomas Gleixner <tglx@linutronix.de>
> Signed-off-by: Joseph Lo <josephl@nvidia.com>

My patch series to add CLOCKSOURCE_OF_DECLARE support to arch timer and
sched_clock enhancements will make this unnecessary:

http://www.spinics.net/lists/arm-kernel/msg234597.html

Testing would be appreciated.

Rob

> ---
>  drivers/clocksource/tegra20_timer.c | 7 +++++--
>  1 file changed, 5 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/clocksource/tegra20_timer.c b/drivers/clocksource/tegra20_timer.c
> index ae877b0..e443f44 100644
> --- a/drivers/clocksource/tegra20_timer.c
> +++ b/drivers/clocksource/tegra20_timer.c
> @@ -30,6 +30,7 @@
>  #include <asm/mach/time.h>
>  #include <asm/smp_twd.h>
>  #include <asm/sched_clock.h>
> +#include <asm/arch_timer.h>
>  
>  #define RTC_SECONDS            0x08
>  #define RTC_SHADOW_SECONDS     0x0c
> @@ -200,8 +201,6 @@ static void __init tegra20_init_timer(struct device_node *np)
>  		WARN(1, "Unknown clock rate");
>  	}
>  
> -	setup_sched_clock(tegra_read_sched_clock, 32, 1000000);
> -
>  	if (clocksource_mmio_init(timer_reg_base + TIMERUS_CNTR_1US,
>  		"timer_us", 1000000, 300, 32, clocksource_mmio_readl_up)) {
>  		pr_err("Failed to register clocksource\n");
> @@ -218,6 +217,10 @@ static void __init tegra20_init_timer(struct device_node *np)
>  	tegra_clockevent.irq = tegra_timer_irq.irq;
>  	clockevents_config_and_register(&tegra_clockevent, 1000000,
>  					0x1, 0x1fffffff);
> +	if (arch_timer_of_register())
> +		setup_sched_clock(tegra_read_sched_clock, 32, 1000000);
> +	else
> +		arch_timer_sched_clock_init();
>  }
>  CLOCKSOURCE_OF_DECLARE(tegra20_timer, "nvidia,tegra20-timer", tegra20_init_timer);
>  
> 

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Stephen Warren April 3, 2013, 6:22 p.m. UTC | #2
On 04/03/2013 07:28 AM, Rob Herring wrote:
> On 04/03/2013 06:32 AM, Joseph Lo wrote:
>> Architected timer is the local timer for Cortex-A15. Adding the support
>> for Tegra.
>>
>> Cc: John Stultz <john.stultz@linaro.org>
>> Cc: Thomas Gleixner <tglx@linutronix.de>
>> Signed-off-by: Joseph Lo <josephl@nvidia.com>
> 
> My patch series to add CLOCKSOURCE_OF_DECLARE support to arch timer and
> sched_clock enhancements will make this unnecessary:
> 
> http://www.spinics.net/lists/arm-kernel/msg234597.html
> 
> Testing would be appreciated.

Joseph (or Rob), what's the benefit of this change; what works with it
and/or what breaks without it?

Rob, if I did apply this change, and you also apply that series of
yours, what is the result: compile-time breakage, run-time breakage,
just some redundant code that needs to be removed again?

Thanks.
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Rob Herring April 3, 2013, 9:34 p.m. UTC | #3
On 04/03/2013 01:22 PM, Stephen Warren wrote:
> On 04/03/2013 07:28 AM, Rob Herring wrote:
>> On 04/03/2013 06:32 AM, Joseph Lo wrote:
>>> Architected timer is the local timer for Cortex-A15. Adding the support
>>> for Tegra.
>>>
>>> Cc: John Stultz <john.stultz@linaro.org>
>>> Cc: Thomas Gleixner <tglx@linutronix.de>
>>> Signed-off-by: Joseph Lo <josephl@nvidia.com>
>>
>> My patch series to add CLOCKSOURCE_OF_DECLARE support to arch timer and
>> sched_clock enhancements will make this unnecessary:
>>
>> http://www.spinics.net/lists/arm-kernel/msg234597.html
>>
>> Testing would be appreciated.
> 
> Joseph (or Rob), what's the benefit of this change; what works with it
> and/or what breaks without it?

I assume you mean Joseph's change. Well, it enables local timers on A15.
But mine will too for Tegra if you have the arch timer in the dtb.

> Rob, if I did apply this change, and you also apply that series of
> yours, what is the result: compile-time breakage, run-time breakage,
> just some redundant code that needs to be removed again?

Compile-time breakage as the functions called here are being removed.

Rob

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Stephen Warren April 3, 2013, 10:48 p.m. UTC | #4
On 04/03/2013 03:34 PM, Rob Herring wrote:
> On 04/03/2013 01:22 PM, Stephen Warren wrote:
>> On 04/03/2013 07:28 AM, Rob Herring wrote:
>>> On 04/03/2013 06:32 AM, Joseph Lo wrote:
>>>> Architected timer is the local timer for Cortex-A15. Adding the support
>>>> for Tegra.
>>>>
>>>> Cc: John Stultz <john.stultz@linaro.org>
>>>> Cc: Thomas Gleixner <tglx@linutronix.de>
>>>> Signed-off-by: Joseph Lo <josephl@nvidia.com>
>>>
>>> My patch series to add CLOCKSOURCE_OF_DECLARE support to arch timer and
>>> sched_clock enhancements will make this unnecessary:
>>>
>>> http://www.spinics.net/lists/arm-kernel/msg234597.html
>>>
>>> Testing would be appreciated.
>>
>> Joseph (or Rob), what's the benefit of this change; what works with it
>> and/or what breaks without it?
> 
> I assume you mean Joseph's change.

Yes.

> Well, it enables local timers on A15.
> But mine will too for Tegra if you have the arch timer in the dtb.

Well, I meant what benefit would I see from enabling them, rather than
using the Tegra-specific timers as I believe is currently happening.

>> Rob, if I did apply this change, and you also apply that series of
>> yours, what is the result: compile-time breakage, run-time breakage,
>> just some redundant code that needs to be removed again?
> 
> Compile-time breakage as the functions called here are being removed.

OK, I definitely won't apply Joseph's patch then.

Aside from that, I took the git branch you mentioned in the patch you
linked to above, merged it into my dev tree, updated my bootloader to
actually initialize the TSC correctly, and I see the following during
boot, so I guess that's enough for:

Tested-by: Stephen Warren <swarren@nvidia.com>

on your patches.

> [    0.000000] sched_clock: 32 bits at 1000kHz, resolution 1000ns, wraps every 4294967ms
> [    0.000000] Architected local timer running at 12.00MHz (virt).
> [    0.000000] Switching to timer-based delay loop
> [  117.431229] Calibrating delay loop (skipped), value calculated using timer frequency.. 24.00 BogoMIPS (lpj=120000)
> [  117.987221] Switching to clocksource arch_sys_counter
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Joseph Lo April 4, 2013, 10:28 a.m. UTC | #5
On Thu, 2013-04-04 at 06:48 +0800, Stephen Warren wrote:
> On 04/03/2013 03:34 PM, Rob Herring wrote:
> > On 04/03/2013 01:22 PM, Stephen Warren wrote:
> >> On 04/03/2013 07:28 AM, Rob Herring wrote:
> >>> On 04/03/2013 06:32 AM, Joseph Lo wrote:
> >> Rob, if I did apply this change, and you also apply that series of
> >> yours, what is the result: compile-time breakage, run-time breakage,
> >> just some redundant code that needs to be removed again?
> > 
> > Compile-time breakage as the functions called here are being removed.
> 
> OK, I definitely won't apply Joseph's patch then.

Agree. This patch is redundant, once Rob's patches go into mainline.
> 
> Aside from that, I took the git branch you mentioned in the patch you
> linked to above, merged it into my dev tree, updated my bootloader to
> actually initialize the TSC correctly, and I see the following during
> boot, so I guess that's enough for:
> 
> Tested-by: Stephen Warren <swarren@nvidia.com>
> 
> on your patches.
> 
> > [    0.000000] sched_clock: 32 bits at 1000kHz, resolution 1000ns, wraps every 4294967ms
> > [    0.000000] Architected local timer running at 12.00MHz (virt).
> > [    0.000000] Switching to timer-based delay loop
> > [  117.431229] Calibrating delay loop (skipped), value calculated using timer frequency.. 24.00 BogoMIPS (lpj=120000)
> > [  117.987221] Switching to clocksource arch_sys_counter


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diff mbox

Patch

diff --git a/drivers/clocksource/tegra20_timer.c b/drivers/clocksource/tegra20_timer.c
index ae877b0..e443f44 100644
--- a/drivers/clocksource/tegra20_timer.c
+++ b/drivers/clocksource/tegra20_timer.c
@@ -30,6 +30,7 @@ 
 #include <asm/mach/time.h>
 #include <asm/smp_twd.h>
 #include <asm/sched_clock.h>
+#include <asm/arch_timer.h>
 
 #define RTC_SECONDS            0x08
 #define RTC_SHADOW_SECONDS     0x0c
@@ -200,8 +201,6 @@  static void __init tegra20_init_timer(struct device_node *np)
 		WARN(1, "Unknown clock rate");
 	}
 
-	setup_sched_clock(tegra_read_sched_clock, 32, 1000000);
-
 	if (clocksource_mmio_init(timer_reg_base + TIMERUS_CNTR_1US,
 		"timer_us", 1000000, 300, 32, clocksource_mmio_readl_up)) {
 		pr_err("Failed to register clocksource\n");
@@ -218,6 +217,10 @@  static void __init tegra20_init_timer(struct device_node *np)
 	tegra_clockevent.irq = tegra_timer_irq.irq;
 	clockevents_config_and_register(&tegra_clockevent, 1000000,
 					0x1, 0x1fffffff);
+	if (arch_timer_of_register())
+		setup_sched_clock(tegra_read_sched_clock, 32, 1000000);
+	else
+		arch_timer_sched_clock_init();
 }
 CLOCKSOURCE_OF_DECLARE(tegra20_timer, "nvidia,tegra20-timer", tegra20_init_timer);