| Message ID | 20240429104633.11060-10-ilpo.jarvinen@linux.intel.com |
|---|---|
| State | New |
| Headers | show |
| Series | PCI: Add generic Conf Type 0/1 helpers | expand |
On Monday 29 April 2024 13:46:32 Ilpo Järvinen wrote: > Convert mvebu to use the pci_conf1_ext_addr() helper from PCI core > to calculate PCI Configuration Space address for Type 1 access. Exampled in other email. mvebu controller uses extended configuration mechanism #1. mvebu_pcie_child_rd_conf/mvebu_pcie_child_wr_conf functions are used only for accessing devices behind the PCIe root port, hence they are for Type 1 access. But the mvebu controller register PCIE_CONF_ADDR_OFF takes address in the configuration mechanism #1 extended format. It does not take format of the command for Type 1 access. Hence the description and the change here is wrong/misleading. > Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> > --- > drivers/pci/controller/pci-mvebu.c | 13 ++----------- > 1 file changed, 2 insertions(+), 11 deletions(-) > > diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c > index 29fe09c99e7d..1908754ee6fd 100644 > --- a/drivers/pci/controller/pci-mvebu.c > +++ b/drivers/pci/controller/pci-mvebu.c > @@ -45,15 +45,6 @@ > #define PCIE_WIN5_BASE_OFF 0x1884 > #define PCIE_WIN5_REMAP_OFF 0x188c > #define PCIE_CONF_ADDR_OFF 0x18f8 > -#define PCIE_CONF_ADDR_EN 0x80000000 > -#define PCIE_CONF_REG(r) ((((r) & 0xf00) << 16) | ((r) & 0xfc)) > -#define PCIE_CONF_BUS(b) (((b) & 0xff) << 16) > -#define PCIE_CONF_DEV(d) (((d) & 0x1f) << 11) > -#define PCIE_CONF_FUNC(f) (((f) & 0x7) << 8) > -#define PCIE_CONF_ADDR(bus, devfn, where) \ > - (PCIE_CONF_BUS(bus) | PCIE_CONF_DEV(PCI_SLOT(devfn)) | \ > - PCIE_CONF_FUNC(PCI_FUNC(devfn)) | PCIE_CONF_REG(where) | \ > - PCIE_CONF_ADDR_EN) > #define PCIE_CONF_DATA_OFF 0x18fc > #define PCIE_INT_CAUSE_OFF 0x1900 > #define PCIE_INT_UNMASK_OFF 0x1910 > @@ -361,7 +352,7 @@ static int mvebu_pcie_child_rd_conf(struct pci_bus *bus, u32 devfn, int where, > > conf_data = port->base + PCIE_CONF_DATA_OFF; > > - mvebu_writel(port, PCIE_CONF_ADDR(bus->number, devfn, where), > + mvebu_writel(port, pci_conf1_ext_addr(bus->number, devfn, where, true), > PCIE_CONF_ADDR_OFF); > > switch (size) { > @@ -397,7 +388,7 @@ static int mvebu_pcie_child_wr_conf(struct pci_bus *bus, u32 devfn, > > conf_data = port->base + PCIE_CONF_DATA_OFF; > > - mvebu_writel(port, PCIE_CONF_ADDR(bus->number, devfn, where), > + mvebu_writel(port, pci_conf1_ext_addr(bus->number, devfn, where, true), > PCIE_CONF_ADDR_OFF); > > switch (size) { > -- > 2.39.2 >
On Mon, Apr 29, 2024 at 01:46:32PM +0300, Ilpo Järvinen wrote: > Convert mvebu to use the pci_conf1_ext_addr() helper from PCI core > to calculate PCI Configuration Space address for Type 1 access. > > Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Tested on a kirkwood QNAP and an Armanda XP. The kirkwood correctly reports there is nothing on the PCIe bus. The XP finds the two 88W8864 WiFi devices, but there is no mainline driver for it, and it also finds an Etron Technology USB controller, which enumerates O.K. Tested-by: Andrew Lunn <andrew@lunn.ch> Andrew
diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c index 29fe09c99e7d..1908754ee6fd 100644 --- a/drivers/pci/controller/pci-mvebu.c +++ b/drivers/pci/controller/pci-mvebu.c @@ -45,15 +45,6 @@ #define PCIE_WIN5_BASE_OFF 0x1884 #define PCIE_WIN5_REMAP_OFF 0x188c #define PCIE_CONF_ADDR_OFF 0x18f8 -#define PCIE_CONF_ADDR_EN 0x80000000 -#define PCIE_CONF_REG(r) ((((r) & 0xf00) << 16) | ((r) & 0xfc)) -#define PCIE_CONF_BUS(b) (((b) & 0xff) << 16) -#define PCIE_CONF_DEV(d) (((d) & 0x1f) << 11) -#define PCIE_CONF_FUNC(f) (((f) & 0x7) << 8) -#define PCIE_CONF_ADDR(bus, devfn, where) \ - (PCIE_CONF_BUS(bus) | PCIE_CONF_DEV(PCI_SLOT(devfn)) | \ - PCIE_CONF_FUNC(PCI_FUNC(devfn)) | PCIE_CONF_REG(where) | \ - PCIE_CONF_ADDR_EN) #define PCIE_CONF_DATA_OFF 0x18fc #define PCIE_INT_CAUSE_OFF 0x1900 #define PCIE_INT_UNMASK_OFF 0x1910 @@ -361,7 +352,7 @@ static int mvebu_pcie_child_rd_conf(struct pci_bus *bus, u32 devfn, int where, conf_data = port->base + PCIE_CONF_DATA_OFF; - mvebu_writel(port, PCIE_CONF_ADDR(bus->number, devfn, where), + mvebu_writel(port, pci_conf1_ext_addr(bus->number, devfn, where, true), PCIE_CONF_ADDR_OFF); switch (size) { @@ -397,7 +388,7 @@ static int mvebu_pcie_child_wr_conf(struct pci_bus *bus, u32 devfn, conf_data = port->base + PCIE_CONF_DATA_OFF; - mvebu_writel(port, PCIE_CONF_ADDR(bus->number, devfn, where), + mvebu_writel(port, pci_conf1_ext_addr(bus->number, devfn, where, true), PCIE_CONF_ADDR_OFF); switch (size) {
Convert mvebu to use the pci_conf1_ext_addr() helper from PCI core to calculate PCI Configuration Space address for Type 1 access. Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> --- drivers/pci/controller/pci-mvebu.c | 13 ++----------- 1 file changed, 2 insertions(+), 11 deletions(-)