diff mbox

Improve things for PR71724, in combine/if_then_else_cond

Message ID CAKdteOZMc6weH3i4OkZW-sQdqSr6rvU8bPnF6CZWrf2t-j9Oaw@mail.gmail.com
State New
Headers show

Commit Message

Christophe Lyon Jan. 25, 2017, 3:20 p.m. UTC 
On 25 January 2017 at 15:55, Bernd Schmidt <bschmidt@redhat.com> wrote:
> On 01/25/2017 10:18 AM, Kyrill Tkachov wrote:
>>
>> The test is supposed to test the generation of the vsel instruction.
>> I believe adding an -mcpu=cortex-a57 to the testcases would be best, as
>> VSEL isn't actually available on Cortex-A5, it's just enabled by the
>> -mfpu=fp-armv8 option.
>> A more realistic configuration would target an ARMv8-A CPU like the
>> Cortex-A57.
>
>
> Ok, let me know if there's anything else you need from my side.
>
Kyrill,

How about the attached patch?

I've added dg-require-effective-target arm_arch_v8a_ok to make sure
it's legitimate to request an armv8-class core, but force -mcpu=cortex-a57
to make sure the intended instructions are present (in case at some
point add-options-for-arm-arch-v8a activates costs/arch variant that
would imply not generating vsel anymore).

I've noticed there are other tests adding arm_v8_vfp and not making
sure to select an appriopriate cpu. As a follow-up patch?

And I checked that my patch makes the tests pass again even
when configuring --with-cpu=cortex-a5.

Thanks,

Christophe

>
> Bernd
>
gcc/testsuite/ChangeLog:

2017-01-25  Christophe Lyon  <christophe.lyon@linaro.org>

	* gcc.target/arm/vseleqdf.c: Require arm_arch_v8a_ok, add
	-mcpu=cortex-a57.
	* gcc.target/arm/vseleqsf.c: Likewise.
	* gcc.target/arm/vselgedf.c: Likewise.
	* gcc.target/arm/vselgesf.c: Likewise.
	* gcc.target/arm/vselgtdf.c: Likewise.
	* gcc.target/arm/vselgtsf.c: Likewise.
	* gcc.target/arm/vselledf.c: Likewise.
	* gcc.target/arm/vsellesf.c: Likewise.
	* gcc.target/arm/vselltdf.c: Likewise.
	* gcc.target/arm/vselltsf.c: Likewise.
	* gcc.target/arm/vselnedf.c: Likewise.
	* gcc.target/arm/vselnesf.c: Likewise.
	* gcc.target/arm/vselvcdf.c: Likewise.
	* gcc.target/arm/vselvcsf.c: Likewise.
	* gcc.target/arm/vselvsdf.c: Likewise.
	* gcc.target/arm/vselvssf.c: Likewise.

Comments

Kyrill Tkachov Jan. 25, 2017, 3:25 p.m. UTC | #1 
On 25/01/17 15:20, Christophe Lyon wrote:
> On 25 January 2017 at 15:55, Bernd Schmidt <bschmidt@redhat.com> wrote:
>> On 01/25/2017 10:18 AM, Kyrill Tkachov wrote:
>>> The test is supposed to test the generation of the vsel instruction.
>>> I believe adding an -mcpu=cortex-a57 to the testcases would be best, as
>>> VSEL isn't actually available on Cortex-A5, it's just enabled by the
>>> -mfpu=fp-armv8 option.
>>> A more realistic configuration would target an ARMv8-A CPU like the
>>> Cortex-A57.
>>
>> Ok, let me know if there's anything else you need from my side.
>>
> Kyrill,
>
> How about the attached patch?

Yes, thanks Christophe.

> I've added dg-require-effective-target arm_arch_v8a_ok to make sure
> it's legitimate to request an armv8-class core, but force -mcpu=cortex-a57
> to make sure the intended instructions are present (in case at some
> point add-options-for-arm-arch-v8a activates costs/arch variant that
> would imply not generating vsel anymore).
>
> I've noticed there are other tests adding arm_v8_vfp and not making
> sure to select an appriopriate cpu. As a follow-up patch?

I wouldn't want to do that too much in the testsuite.
In the VSEL tests we have a C-level idiom (?: construct) that we expect
the optimisers to transform into a conditional select instruction that may or may not
be a win on some cores.

In some of those other tests I suspect we want to generate the instruction for all tunings.
I.e. I'd expect the rounding tests (__builtin_floor/trunc etc) to always generate VRINT*
when the -mfpu allows it, regardless of the CPU tuning.

Kyrill

> And I checked that my patch makes the tests pass again even
> when configuring --with-cpu=cortex-a5.


> Thanks,
>
> Christophe
>
>> Bernd
>>
diff mbox

Patch

diff --git a/gcc/testsuite/gcc.target/arm/vseleqdf.c b/gcc/testsuite/gcc.target/arm/vseleqdf.c
index 86e147b..64d5784 100644
--- a/gcc/testsuite/gcc.target/arm/vseleqdf.c
+++ b/gcc/testsuite/gcc.target/arm/vseleqdf.c
@@ -1,6 +1,7 @@ 
 /* { dg-do compile } */
+/* { dg-require-effective-target arm_arch_v8a_ok */
 /* { dg-require-effective-target arm_v8_vfp_ok } */
-/* { dg-options "-O2" } */
+/* { dg-options "-O2 -mcpu=cortex-a57" } */
 /* { dg-add-options arm_v8_vfp } */
 
 double
diff --git a/gcc/testsuite/gcc.target/arm/vseleqsf.c b/gcc/testsuite/gcc.target/arm/vseleqsf.c
index 120f44b..b052704 100644
--- a/gcc/testsuite/gcc.target/arm/vseleqsf.c
+++ b/gcc/testsuite/gcc.target/arm/vseleqsf.c
@@ -1,6 +1,7 @@ 
 /* { dg-do compile } */
+/* { dg-require-effective-target arm_arch_v8a_ok */
 /* { dg-require-effective-target arm_v8_vfp_ok } */
-/* { dg-options "-O2" } */
+/* { dg-options "-O2 -mcpu=cortex-a57" } */
 /* { dg-add-options arm_v8_vfp } */
 
 float
diff --git a/gcc/testsuite/gcc.target/arm/vselgedf.c b/gcc/testsuite/gcc.target/arm/vselgedf.c
index cea08d1..e10508f 100644
--- a/gcc/testsuite/gcc.target/arm/vselgedf.c
+++ b/gcc/testsuite/gcc.target/arm/vselgedf.c
@@ -1,6 +1,7 @@ 
 /* { dg-do compile } */
+/* { dg-require-effective-target arm_arch_v8a_ok */
 /* { dg-require-effective-target arm_v8_vfp_ok } */
-/* { dg-options "-O2" } */
+/* { dg-options "-O2 -mcpu=cortex-a57" } */
 /* { dg-add-options arm_v8_vfp } */
 
 double
diff --git a/gcc/testsuite/gcc.target/arm/vselgesf.c b/gcc/testsuite/gcc.target/arm/vselgesf.c
index 86f2a04..645cf5d 100644
--- a/gcc/testsuite/gcc.target/arm/vselgesf.c
+++ b/gcc/testsuite/gcc.target/arm/vselgesf.c
@@ -1,6 +1,7 @@ 
 /* { dg-do compile } */
+/* { dg-require-effective-target arm_arch_v8a_ok */
 /* { dg-require-effective-target arm_v8_vfp_ok } */
-/* { dg-options "-O2" } */
+/* { dg-options "-O2 -mcpu=cortex-a57" } */
 /* { dg-add-options arm_v8_vfp } */
 
 float
diff --git a/gcc/testsuite/gcc.target/arm/vselgtdf.c b/gcc/testsuite/gcc.target/arm/vselgtdf.c
index 2c4a6ba..741b9a8 100644
--- a/gcc/testsuite/gcc.target/arm/vselgtdf.c
+++ b/gcc/testsuite/gcc.target/arm/vselgtdf.c
@@ -1,6 +1,7 @@ 
 /* { dg-do compile } */
+/* { dg-require-effective-target arm_arch_v8a_ok */
 /* { dg-require-effective-target arm_v8_vfp_ok } */
-/* { dg-options "-O2" } */
+/* { dg-options "-O2 -mcpu=cortex-a57" } */
 /* { dg-add-options arm_v8_vfp } */
 
 double
diff --git a/gcc/testsuite/gcc.target/arm/vselgtsf.c b/gcc/testsuite/gcc.target/arm/vselgtsf.c
index 388e74c..3042c5b 100644
--- a/gcc/testsuite/gcc.target/arm/vselgtsf.c
+++ b/gcc/testsuite/gcc.target/arm/vselgtsf.c
@@ -1,6 +1,7 @@ 
 /* { dg-do compile } */
+/* { dg-require-effective-target arm_arch_v8a_ok */
 /* { dg-require-effective-target arm_v8_vfp_ok } */
-/* { dg-options "-O2" } */
+/* { dg-options "-O2 -mcpu=cortex-a57" } */
 /* { dg-add-options arm_v8_vfp } */
 
 float
diff --git a/gcc/testsuite/gcc.target/arm/vselledf.c b/gcc/testsuite/gcc.target/arm/vselledf.c
index 088dc04..dcf46a3 100644
--- a/gcc/testsuite/gcc.target/arm/vselledf.c
+++ b/gcc/testsuite/gcc.target/arm/vselledf.c
@@ -1,6 +1,7 @@ 
 /* { dg-do compile } */
+/* { dg-require-effective-target arm_arch_v8a_ok */
 /* { dg-require-effective-target arm_v8_vfp_ok } */
-/* { dg-options "-O2" } */
+/* { dg-options "-O2 -mcpu=cortex-a57" } */
 /* { dg-add-options arm_v8_vfp } */
 
 double
diff --git a/gcc/testsuite/gcc.target/arm/vsellesf.c b/gcc/testsuite/gcc.target/arm/vsellesf.c
index d0afdbc..38b06eb 100644
--- a/gcc/testsuite/gcc.target/arm/vsellesf.c
+++ b/gcc/testsuite/gcc.target/arm/vsellesf.c
@@ -1,6 +1,7 @@ 
 /* { dg-do compile } */
+/* { dg-require-effective-target arm_arch_v8a_ok */
 /* { dg-require-effective-target arm_v8_vfp_ok } */
-/* { dg-options "-O2" } */
+/* { dg-options "-O2 -mcpu=cortex-a57" } */
 /* { dg-add-options arm_v8_vfp } */
 
 float
diff --git a/gcc/testsuite/gcc.target/arm/vselltdf.c b/gcc/testsuite/gcc.target/arm/vselltdf.c
index fbcb9ea..4d4d91c 100644
--- a/gcc/testsuite/gcc.target/arm/vselltdf.c
+++ b/gcc/testsuite/gcc.target/arm/vselltdf.c
@@ -1,6 +1,7 @@ 
 /* { dg-do compile } */
+/* { dg-require-effective-target arm_arch_v8a_ok */
 /* { dg-require-effective-target arm_v8_vfp_ok } */
-/* { dg-options "-O2" } */
+/* { dg-options "-O2 -mcpu=cortex-a57" } */
 /* { dg-add-options arm_v8_vfp } */
 
 double
diff --git a/gcc/testsuite/gcc.target/arm/vselltsf.c b/gcc/testsuite/gcc.target/arm/vselltsf.c
index 959dab7..ab3f77f 100644
--- a/gcc/testsuite/gcc.target/arm/vselltsf.c
+++ b/gcc/testsuite/gcc.target/arm/vselltsf.c
@@ -1,6 +1,7 @@ 
 /* { dg-do compile } */
+/* { dg-require-effective-target arm_arch_v8a_ok */
 /* { dg-require-effective-target arm_v8_vfp_ok } */
-/* { dg-options "-O2" } */
+/* { dg-options "-O2 -mcpu=cortex-a57" } */
 /* { dg-add-options arm_v8_vfp } */
 
 float
diff --git a/gcc/testsuite/gcc.target/arm/vselnedf.c b/gcc/testsuite/gcc.target/arm/vselnedf.c
index cf67f29..4b0fa5e 100644
--- a/gcc/testsuite/gcc.target/arm/vselnedf.c
+++ b/gcc/testsuite/gcc.target/arm/vselnedf.c
@@ -1,6 +1,7 @@ 
 /* { dg-do compile } */
+/* { dg-require-effective-target arm_arch_v8a_ok */
 /* { dg-require-effective-target arm_v8_vfp_ok } */
-/* { dg-options "-O2" } */
+/* { dg-options "-O2 -mcpu=cortex-a57" } */
 /* { dg-add-options arm_v8_vfp } */
 
 double
diff --git a/gcc/testsuite/gcc.target/arm/vselnesf.c b/gcc/testsuite/gcc.target/arm/vselnesf.c
index 2e16423..4fcd5a0 100644
--- a/gcc/testsuite/gcc.target/arm/vselnesf.c
+++ b/gcc/testsuite/gcc.target/arm/vselnesf.c
@@ -1,6 +1,7 @@ 
 /* { dg-do compile } */
+/* { dg-require-effective-target arm_arch_v8a_ok */
 /* { dg-require-effective-target arm_v8_vfp_ok } */
-/* { dg-options "-O2" } */
+/* { dg-options "-O2 -mcpu=cortex-a57" } */
 /* { dg-add-options arm_v8_vfp } */
 
 float
diff --git a/gcc/testsuite/gcc.target/arm/vselvcdf.c b/gcc/testsuite/gcc.target/arm/vselvcdf.c
index 7f30270..9701e11 100644
--- a/gcc/testsuite/gcc.target/arm/vselvcdf.c
+++ b/gcc/testsuite/gcc.target/arm/vselvcdf.c
@@ -1,6 +1,7 @@ 
 /* { dg-do compile } */
+/* { dg-require-effective-target arm_arch_v8a_ok */
 /* { dg-require-effective-target arm_v8_vfp_ok } */
-/* { dg-options "-O2" } */
+/* { dg-options "-O2 -mcpu=cortex-a57" } */
 /* { dg-add-options arm_v8_vfp } */
 
 double
diff --git a/gcc/testsuite/gcc.target/arm/vselvcsf.c b/gcc/testsuite/gcc.target/arm/vselvcsf.c
index 1bb7369..2d47f30 100644
--- a/gcc/testsuite/gcc.target/arm/vselvcsf.c
+++ b/gcc/testsuite/gcc.target/arm/vselvcsf.c
@@ -1,6 +1,7 @@ 
 /* { dg-do compile } */
+/* { dg-require-effective-target arm_arch_v8a_ok */
 /* { dg-require-effective-target arm_v8_vfp_ok } */
-/* { dg-options "-O2" } */
+/* { dg-options "-O2 -mcpu=cortex-a57" } */
 /* { dg-add-options arm_v8_vfp } */
 
 float
diff --git a/gcc/testsuite/gcc.target/arm/vselvsdf.c b/gcc/testsuite/gcc.target/arm/vselvsdf.c
index 83ad5bf..54555a2 100644
--- a/gcc/testsuite/gcc.target/arm/vselvsdf.c
+++ b/gcc/testsuite/gcc.target/arm/vselvsdf.c
@@ -1,6 +1,7 @@ 
 /* { dg-do compile } */
+/* { dg-require-effective-target arm_arch_v8a_ok */
 /* { dg-require-effective-target arm_v8_vfp_ok } */
-/* { dg-options "-O2" } */
+/* { dg-options "-O2 -mcpu=cortex-a57" } */
 /* { dg-add-options arm_v8_vfp } */
 
 double
diff --git a/gcc/testsuite/gcc.target/arm/vselvssf.c b/gcc/testsuite/gcc.target/arm/vselvssf.c
index 7d76289..a37305d 100644
--- a/gcc/testsuite/gcc.target/arm/vselvssf.c
+++ b/gcc/testsuite/gcc.target/arm/vselvssf.c
@@ -1,6 +1,7 @@ 
 /* { dg-do compile } */
+/* { dg-require-effective-target arm_arch_v8a_ok */
 /* { dg-require-effective-target arm_v8_vfp_ok } */
-/* { dg-options "-O2" } */
+/* { dg-options "-O2 -mcpu=cortex-a57" } */
 /* { dg-add-options arm_v8_vfp } */
 
 float