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[committed] Further improvements to H8 variable shift patterns

Message ID 960ff18f-8daa-af73-c6ea-741e83117f47@gmail.com
State New
Headers show
Series [committed] Further improvements to H8 variable shift patterns | expand

Commit Message

Jeff Law July 8, 2021, 9:12 p.m. UTC 
And another installment in optimizing a dead architecture.   This builds 
on prior patches to improve compare/test elimination for shifts.  
Specifically for the older chips in the H8 family we have to handle 
variable shifts with a loop.

Right now the splitter generates (set (pc) (if_then_else (lt (countreg) 
(const_int 0))) to test the shift count.  That will get lowered into a 
compare and a conditional branch using CC_REG. However, this lowering 
happens after the compare-elim pass, so we don't get much benefit.

Instead we can lower directly to the cc exposing form and remove the 
unnecessary test ourselves (particularly for the case where the shift 
count pseudo does not die).  Essentially we know that the copy into the 
scratch register is going to set the condition codes in a useful way.  
So we expose the condition codes on that copy and emit a condition code 
exposed conditional branch and no longer generate the comparison.

Built & tested in the usual way on the H8 without regressions.  
Committed to the trunk.

Probably the last H8 patch before going on vacation :-)

Jeff
commit b14ac7b29c9a05c94f62fe065c219bbaa83653db
Author: Jeff Law <jeffreyalaw@gmail.com>
Date:   Thu Jul 8 17:09:36 2021 -0400

    Further improvements to H8 variable shift patterns
    
    gcc/
    
            * config/h8300/shiftrotate.md (variable shifts): Expose condition
            code handling for the test before the loop.
diff mbox series

Patch

diff --git a/gcc/config/h8300/shiftrotate.md b/gcc/config/h8300/shiftrotate.md
index 485303cb906..d3aa6bea064 100644
--- a/gcc/config/h8300/shiftrotate.md
+++ b/gcc/config/h8300/shiftrotate.md
@@ -377,8 +377,10 @@ 
    (clobber (reg:CC CC_REG))]
   "epilogue_completed
    && find_regno_note (insn, REG_DEAD, REGNO (operands[1]))"
-  [(set (pc)
-        (if_then_else (le (match_dup 1) (const_int 0))
+  [(set (reg:CCZN CC_REG)
+        (compare:CCZN (match_dup 1) (const_int 0)))
+   (set (pc)
+        (if_then_else (le (reg:CCZN CC_REG)  (const_int 0))
 		      (label_ref (match_dup 5))
 		      (pc)))
    (match_dup 4)
@@ -411,10 +413,12 @@ 
    (clobber (reg:CC CC_REG))]
   "epilogue_completed
    && !find_regno_note (insn, REG_DEAD, REGNO (operands[1]))"
-  [(set (match_dup 3)
-	(match_dup 1))
+  [(parallel
+     [(set (reg:CCZN CC_REG)
+	   (compare:CCZN (match_dup 1) (const_int 0)))
+      (set (match_dup 3) (match_dup 1))])
    (set (pc)
-        (if_then_else (le (match_dup 3) (const_int 0))
+        (if_then_else (le (reg:CCZN CC_REG) (const_int 0))
 		      (label_ref (match_dup 5))
 		      (pc)))
    (match_dup 4)