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[ARM] Fix RTL checking failure in Thumb mode

Message ID 4036281.RHsQ6GBEg0@arcturus.home
State New
Headers show

Commit Message

Eric Botcazou Aug. 31, 2016, 7:31 a.m. UTC
Hi,

compiling any non-trivial program in Thumb mode yields with RTL checking:

eric@arcturus:~/build/gcc/arm-eabi> gcc/xgcc -Bgcc -S t.c -mthumb
t.c:4:5: internal compiler error: RTL check: expected code 'const_int', have 
'reg' in thumb1_size_rtx_costs, at config/arm/arm.c:9130
 int foo (int a, int b, int c, int d, double i)
     ^~~
0xb0da47 rtl_check_failed_code1(rtx_def const*, rtx_code, char const*, int, 
char const*)
        /home/eric/svn/gcc/gcc/rtl.c:811
0xf13472 thumb1_size_rtx_costs
        /home/eric/svn/gcc/gcc/config/arm/arm.c:9130
0xf1cd10 arm_size_rtx_costs
        /home/eric/svn/gcc/gcc/config/arm/arm.c:9239
0xf1cd10 arm_rtx_costs
        /home/eric/svn/gcc/gcc/config/arm/arm.c:11290

so even libgcc cannot be built.

(gdb) frame 2
#2  0x0000000000f13473 in thumb1_size_rtx_costs (x=x@entry=0x7ffff6a622d0, 
    code=code@entry=SET, outer=outer@entry=INSN)
    at /home/eric/svn/gcc/gcc/config/arm/arm.c:9130
9130              || (UINTVAL (SET_SRC (x)) >= 256
(gdb) p debug_rtx(x)
(set (reg:SI 110)
    (reg:SI 111))

Proposed fix attached, built on arm-eabi, OK for the mainline?


2016-08-31  Eric Botcazou  <ebotcazou@adacore.com>

	* config/arm/arm.c (thumb1_size_rtx_costs) <SET>: Add missing guard.

Comments

Kyrill Tkachov Aug. 31, 2016, 8:23 a.m. UTC | #1
On 31/08/16 08:31, Eric Botcazou wrote:
> Hi,
>
> compiling any non-trivial program in Thumb mode yields with RTL checking:
>
> eric@arcturus:~/build/gcc/arm-eabi> gcc/xgcc -Bgcc -S t.c -mthumb
> t.c:4:5: internal compiler error: RTL check: expected code 'const_int', have
> 'reg' in thumb1_size_rtx_costs, at config/arm/arm.c:9130
>   int foo (int a, int b, int c, int d, double i)
>       ^~~
> 0xb0da47 rtl_check_failed_code1(rtx_def const*, rtx_code, char const*, int,
> char const*)
>          /home/eric/svn/gcc/gcc/rtl.c:811
> 0xf13472 thumb1_size_rtx_costs
>          /home/eric/svn/gcc/gcc/config/arm/arm.c:9130
> 0xf1cd10 arm_size_rtx_costs
>          /home/eric/svn/gcc/gcc/config/arm/arm.c:9239
> 0xf1cd10 arm_rtx_costs
>          /home/eric/svn/gcc/gcc/config/arm/arm.c:11290
>
> so even libgcc cannot be built.
>
> (gdb) frame 2
> #2  0x0000000000f13473 in thumb1_size_rtx_costs (x=x@entry=0x7ffff6a622d0,
>      code=code@entry=SET, outer=outer@entry=INSN)
>      at /home/eric/svn/gcc/gcc/config/arm/arm.c:9130
> 9130              || (UINTVAL (SET_SRC (x)) >= 256
> (gdb) p debug_rtx(x)
> (set (reg:SI 110)
>      (reg:SI 111))
>
> Proposed fix attached, built on arm-eabi, OK for the mainline?

Ok.
Thanks,
Kyrill

>
> 2016-08-31  Eric Botcazou  <ebotcazou@adacore.com>
>
> 	* config/arm/arm.c (thumb1_size_rtx_costs) <SET>: Add missing guard.
>
diff mbox

Patch

Index: config/arm/arm.c
===================================================================
--- config/arm/arm.c	(revision 239842)
+++ config/arm/arm.c	(working copy)
@@ -9127,7 +9127,8 @@  thumb1_size_rtx_costs (rtx x, enum rtx_code code,
       if (satisfies_constraint_J (SET_SRC (x))
 	  || satisfies_constraint_K (SET_SRC (x))
 	     /* Too big an immediate for a 2-byte mov, using MOVT.  */
-	  || (UINTVAL (SET_SRC (x)) >= 256
+	  || (CONST_INT_P (SET_SRC (x))
+	      && UINTVAL (SET_SRC (x)) >= 256
 	      && TARGET_HAVE_MOVT
 	      && satisfies_constraint_j (SET_SRC (x)))
 	     /* thumb1_movdi_insn.  */