| Message ID | 20240312070635.4124681-1-pan2.li@intel.com |
|---|---|
| State | New |
| Headers | show |
| Series | [v1] RISC-V: Fix some code style issue(s) in riscv-c.cc [NFC] | expand |
LGTM :) On Tue, Mar 12, 2024 at 3:07 PM <pan2.li@intel.com> wrote: > > From: Pan Li <pan2.li@intel.com> > > Notice some code style issue(s) when add __riscv_v_fixed_vlen, includes: > > * Meanless empty line. > * Line greater than 80 chars. > * Indent with 3 space(s). > * Argument unalignment. > > gcc/ChangeLog: > > * config/riscv/riscv-c.cc (riscv_ext_version_value): Fix > code style greater than 80 chars. > (riscv_cpu_cpp_builtins): Fix useless empty line, indent > with 3 space(s) and argument unalignment. > > Signed-off-by: Pan Li <pan2.li@intel.com> > --- > gcc/config/riscv/riscv-c.cc | 10 +++++----- > 1 file changed, 5 insertions(+), 5 deletions(-) > > diff --git a/gcc/config/riscv/riscv-c.cc b/gcc/config/riscv/riscv-c.cc > index 3755ec0b8ef..7029ba88186 100644 > --- a/gcc/config/riscv/riscv-c.cc > +++ b/gcc/config/riscv/riscv-c.cc > @@ -37,7 +37,8 @@ along with GCC; see the file COPYING3. If not see > static int > riscv_ext_version_value (unsigned major, unsigned minor) > { > - return (major * RISCV_MAJOR_VERSION_BASE) + (minor * RISCV_MINOR_VERSION_BASE); > + return (major * RISCV_MAJOR_VERSION_BASE) > + + (minor * RISCV_MINOR_VERSION_BASE); > } > > /* Implement TARGET_CPU_CPP_BUILTINS. */ > @@ -110,7 +111,6 @@ riscv_cpu_cpp_builtins (cpp_reader *pfile) > case CM_MEDANY: > builtin_define ("__riscv_cmodel_medany"); > break; > - > } > > if (riscv_user_wants_strict_align) > @@ -142,9 +142,9 @@ riscv_cpu_cpp_builtins (cpp_reader *pfile) > riscv_ext_version_value (0, 12)); > } > > - if (TARGET_XTHEADVECTOR) > - builtin_define_with_int_value ("__riscv_th_v_intrinsic", > - riscv_ext_version_value (0, 11)); > + if (TARGET_XTHEADVECTOR) > + builtin_define_with_int_value ("__riscv_th_v_intrinsic", > + riscv_ext_version_value (0, 11)); > > /* Define architecture extension test macros. */ > builtin_define_with_int_value ("__riscv_arch_test", 1); > -- > 2.34.1 >
Committed, thanks Kito. Pan -----Original Message----- From: Kito Cheng <kito.cheng@gmail.com> Sent: Tuesday, March 12, 2024 3:11 PM To: Li, Pan2 <pan2.li@intel.com> Cc: gcc-patches@gcc.gnu.org; juzhe.zhong@rivai.ai; Wang, Yanzhang <yanzhang.wang@intel.com> Subject: Re: [PATCH v1] RISC-V: Fix some code style issue(s) in riscv-c.cc [NFC] LGTM :) On Tue, Mar 12, 2024 at 3:07 PM <pan2.li@intel.com> wrote: > > From: Pan Li <pan2.li@intel.com> > > Notice some code style issue(s) when add __riscv_v_fixed_vlen, includes: > > * Meanless empty line. > * Line greater than 80 chars. > * Indent with 3 space(s). > * Argument unalignment. > > gcc/ChangeLog: > > * config/riscv/riscv-c.cc (riscv_ext_version_value): Fix > code style greater than 80 chars. > (riscv_cpu_cpp_builtins): Fix useless empty line, indent > with 3 space(s) and argument unalignment. > > Signed-off-by: Pan Li <pan2.li@intel.com> > --- > gcc/config/riscv/riscv-c.cc | 10 +++++----- > 1 file changed, 5 insertions(+), 5 deletions(-) > > diff --git a/gcc/config/riscv/riscv-c.cc b/gcc/config/riscv/riscv-c.cc > index 3755ec0b8ef..7029ba88186 100644 > --- a/gcc/config/riscv/riscv-c.cc > +++ b/gcc/config/riscv/riscv-c.cc > @@ -37,7 +37,8 @@ along with GCC; see the file COPYING3. If not see > static int > riscv_ext_version_value (unsigned major, unsigned minor) > { > - return (major * RISCV_MAJOR_VERSION_BASE) + (minor * RISCV_MINOR_VERSION_BASE); > + return (major * RISCV_MAJOR_VERSION_BASE) > + + (minor * RISCV_MINOR_VERSION_BASE); > } > > /* Implement TARGET_CPU_CPP_BUILTINS. */ > @@ -110,7 +111,6 @@ riscv_cpu_cpp_builtins (cpp_reader *pfile) > case CM_MEDANY: > builtin_define ("__riscv_cmodel_medany"); > break; > - > } > > if (riscv_user_wants_strict_align) > @@ -142,9 +142,9 @@ riscv_cpu_cpp_builtins (cpp_reader *pfile) > riscv_ext_version_value (0, 12)); > } > > - if (TARGET_XTHEADVECTOR) > - builtin_define_with_int_value ("__riscv_th_v_intrinsic", > - riscv_ext_version_value (0, 11)); > + if (TARGET_XTHEADVECTOR) > + builtin_define_with_int_value ("__riscv_th_v_intrinsic", > + riscv_ext_version_value (0, 11)); > > /* Define architecture extension test macros. */ > builtin_define_with_int_value ("__riscv_arch_test", 1); > -- > 2.34.1 >
diff --git a/gcc/config/riscv/riscv-c.cc b/gcc/config/riscv/riscv-c.cc index 3755ec0b8ef..7029ba88186 100644 --- a/gcc/config/riscv/riscv-c.cc +++ b/gcc/config/riscv/riscv-c.cc @@ -37,7 +37,8 @@ along with GCC; see the file COPYING3. If not see static int riscv_ext_version_value (unsigned major, unsigned minor) { - return (major * RISCV_MAJOR_VERSION_BASE) + (minor * RISCV_MINOR_VERSION_BASE); + return (major * RISCV_MAJOR_VERSION_BASE) + + (minor * RISCV_MINOR_VERSION_BASE); } /* Implement TARGET_CPU_CPP_BUILTINS. */ @@ -110,7 +111,6 @@ riscv_cpu_cpp_builtins (cpp_reader *pfile) case CM_MEDANY: builtin_define ("__riscv_cmodel_medany"); break; - } if (riscv_user_wants_strict_align) @@ -142,9 +142,9 @@ riscv_cpu_cpp_builtins (cpp_reader *pfile) riscv_ext_version_value (0, 12)); } - if (TARGET_XTHEADVECTOR) - builtin_define_with_int_value ("__riscv_th_v_intrinsic", - riscv_ext_version_value (0, 11)); + if (TARGET_XTHEADVECTOR) + builtin_define_with_int_value ("__riscv_th_v_intrinsic", + riscv_ext_version_value (0, 11)); /* Define architecture extension test macros. */ builtin_define_with_int_value ("__riscv_arch_test", 1);