| Message ID | 20230818060131.1416714-1-haochen.jiang@intel.com |
|---|---|
| State | New |
| Headers | show |
| Series | i386: Add AVX2 pragma wrapper for AVX512DQVL intrins | expand |
On Fri, Aug 18, 2023 at 2:01 PM Haochen Jiang via Gcc-patches <gcc-patches@gcc.gnu.org> wrote: > > Hi all, > > This patch aims to fix PR111051, which actually make sure that AVX2 > intrins are visible to AVX512/AVX10 intrins under any circumstances. > > I will also apply the same fix on AVX512DQ scalar intrins. > > Regtested on on x86_64-pc-linux-gnu. Ok for trunk? Ok. > > Thx, > Haochen > > PR target/111051 > > gcc/ChangeLog: > > * config/i386/avx512vldqintrin.h: Push AVX2 when AVX2 is > disabled. > > gcc/testsuite/ChangeLog: > > PR target/111051 > * gcc.target/i386/pr111051-1.c: New test. > --- > gcc/config/i386/avx512vldqintrin.h | 11 +++++++++++ > gcc/testsuite/gcc.target/i386/pr111051-1.c | 11 +++++++++++ > 2 files changed, 22 insertions(+) > create mode 100644 gcc/testsuite/gcc.target/i386/pr111051-1.c > > diff --git a/gcc/config/i386/avx512vldqintrin.h b/gcc/config/i386/avx512vldqintrin.h > index 1fbf93a0b52..db900ebf467 100644 > --- a/gcc/config/i386/avx512vldqintrin.h > +++ b/gcc/config/i386/avx512vldqintrin.h > @@ -28,6 +28,12 @@ > #ifndef _AVX512VLDQINTRIN_H_INCLUDED > #define _AVX512VLDQINTRIN_H_INCLUDED > > +#if !defined(__AVX2__) > +#pragma GCC push_options > +#pragma GCC target("avx2") > +#define __DISABLE_AVX2__ > +#endif /* __AVX2__ */ > + > extern __inline __m256i > __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) > _mm256_cvttpd_epi64 (__m256d __A) > @@ -2002,4 +2008,9 @@ _mm256_maskz_insertf64x2 (__mmask8 __U, __m256d __A, __m128d __B, > > #endif > > +#ifdef __DISABLE_AVX2__ > +#undef __DISABLE_AVX2__ > +#pragma GCC pop_options > +#endif /* __DISABLE_AVX2__ */ > + > #endif /* _AVX512VLDQINTRIN_H_INCLUDED */ > diff --git a/gcc/testsuite/gcc.target/i386/pr111051-1.c b/gcc/testsuite/gcc.target/i386/pr111051-1.c > new file mode 100644 > index 00000000000..973007043cb > --- /dev/null > +++ b/gcc/testsuite/gcc.target/i386/pr111051-1.c > @@ -0,0 +1,11 @@ > +/* { dg-do compile } */ > + > +#include <immintrin.h> > + > +#pragma GCC target("avx512vl,avx512dq") > + > +void foo (__m256i i) > +{ > + volatile __m256d v1 = _mm256_cvtepi64_pd (i); > +} > + > -- > 2.31.1 >
diff --git a/gcc/config/i386/avx512vldqintrin.h b/gcc/config/i386/avx512vldqintrin.h index 1fbf93a0b52..db900ebf467 100644 --- a/gcc/config/i386/avx512vldqintrin.h +++ b/gcc/config/i386/avx512vldqintrin.h @@ -28,6 +28,12 @@ #ifndef _AVX512VLDQINTRIN_H_INCLUDED #define _AVX512VLDQINTRIN_H_INCLUDED +#if !defined(__AVX2__) +#pragma GCC push_options +#pragma GCC target("avx2") +#define __DISABLE_AVX2__ +#endif /* __AVX2__ */ + extern __inline __m256i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm256_cvttpd_epi64 (__m256d __A) @@ -2002,4 +2008,9 @@ _mm256_maskz_insertf64x2 (__mmask8 __U, __m256d __A, __m128d __B, #endif +#ifdef __DISABLE_AVX2__ +#undef __DISABLE_AVX2__ +#pragma GCC pop_options +#endif /* __DISABLE_AVX2__ */ + #endif /* _AVX512VLDQINTRIN_H_INCLUDED */ diff --git a/gcc/testsuite/gcc.target/i386/pr111051-1.c b/gcc/testsuite/gcc.target/i386/pr111051-1.c new file mode 100644 index 00000000000..973007043cb --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr111051-1.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ + +#include <immintrin.h> + +#pragma GCC target("avx512vl,avx512dq") + +void foo (__m256i i) +{ + volatile __m256d v1 = _mm256_cvtepi64_pd (i); +} +