| Message ID | 20230816231403.321156-1-patrick@rivosinc.com |
|---|---|
| State | New |
| Headers | show |
| Series | RISC-V: Add rotate immediate regression test | expand |
On Wed, Aug 16, 2023 at 4:15 PM Patrick O'Neill <patrick@rivosinc.com> wrote: > > This adds new regression tests to ensure half-register rotations are > correctly optimized into rori instructions. > > gcc/testsuite/ChangeLog: > > * gcc.target/riscv/zbb-rol-ror-04.c: Add half-register rotation > cases. > * gcc.target/riscv/zbb-rol-ror-05.c: Add half-register rotation > case. My suggestion is to add a new file instead of appending the testcase. Thanks, Andrew Pinski > > Co-authored-by: Charlie Jenkins <charlie@rivosinc.com> > Signed-off-by: Patrick O'Neill <patrick@rivosinc.com> > --- > Trunk optimized these added testcases correctly. > GCC 13.2 and earlier do not optimize these cases correctly. > > Expands on testcases added in: > https://gcc.gnu.org/git/?p=gcc.git;a=commit;f=gcc/testsuite/gcc.target/riscv/zbb-rol-ror-04.c;h=0ccf520d349a82dafca0deb3d307a1080e8589a0 > --- > .../gcc.target/riscv/zbb-rol-ror-04.c | 20 +++++++++++++++++++ > .../gcc.target/riscv/zbb-rol-ror-05.c | 10 ++++++++++ > 2 files changed, 30 insertions(+) > > diff --git a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-04.c b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-04.c > index 7ef4c29dd5b..dcd7be874ab 100644 > --- a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-04.c > +++ b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-04.c > @@ -51,3 +51,23 @@ unsigned int foo5(unsigned int rs1, unsigned int rs2) > { > return (rs1 >> rs2) | (rs1 << (32 - rs2)); > } > + > +/* > +**foo6: > +** rori a0,a0,32 > +** ret > +*/ > +unsigned long foo6(unsigned long rotate) > +{ > + return (rotate << 32) | (rotate >> 32); > +} > + > +/* > +**foo7: > +** roriw a0,a0,16 > +** ret > +*/ > +unsigned int foo7(unsigned int rotate) > +{ > + return (rotate << 16) | (rotate >> 16); > +} > diff --git a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-05.c b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-05.c > index 2108ccc3e77..5ae1d4a92d9 100644 > --- a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-05.c > +++ b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-05.c > @@ -23,3 +23,13 @@ unsigned int foo2(unsigned int rs1) > { > return (rs1 << 10) | (rs1 >> 22); > } > + > +/* > +**foo3: > +** rori a0,a0,16 > +** ret > +*/ > +unsigned int foo3(unsigned int rs1) > +{ > + return (rs1 << 16) | (rs1 >> 16); > +} > -- > 2.34.1 > >
diff --git a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-04.c b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-04.c index 7ef4c29dd5b..dcd7be874ab 100644 --- a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-04.c +++ b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-04.c @@ -51,3 +51,23 @@ unsigned int foo5(unsigned int rs1, unsigned int rs2) { return (rs1 >> rs2) | (rs1 << (32 - rs2)); } + +/* +**foo6: +** rori a0,a0,32 +** ret +*/ +unsigned long foo6(unsigned long rotate) +{ + return (rotate << 32) | (rotate >> 32); +} + +/* +**foo7: +** roriw a0,a0,16 +** ret +*/ +unsigned int foo7(unsigned int rotate) +{ + return (rotate << 16) | (rotate >> 16); +} diff --git a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-05.c b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-05.c index 2108ccc3e77..5ae1d4a92d9 100644 --- a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-05.c +++ b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-05.c @@ -23,3 +23,13 @@ unsigned int foo2(unsigned int rs1) { return (rs1 << 10) | (rs1 >> 22); } + +/* +**foo3: +** rori a0,a0,16 +** ret +*/ +unsigned int foo3(unsigned int rs1) +{ + return (rs1 << 16) | (rs1 >> 16); +}
This adds new regression tests to ensure half-register rotations are correctly optimized into rori instructions. gcc/testsuite/ChangeLog: * gcc.target/riscv/zbb-rol-ror-04.c: Add half-register rotation cases. * gcc.target/riscv/zbb-rol-ror-05.c: Add half-register rotation case. Co-authored-by: Charlie Jenkins <charlie@rivosinc.com> Signed-off-by: Patrick O'Neill <patrick@rivosinc.com> --- Trunk optimized these added testcases correctly. GCC 13.2 and earlier do not optimize these cases correctly. Expands on testcases added in: https://gcc.gnu.org/git/?p=gcc.git;a=commit;f=gcc/testsuite/gcc.target/riscv/zbb-rol-ror-04.c;h=0ccf520d349a82dafca0deb3d307a1080e8589a0 --- .../gcc.target/riscv/zbb-rol-ror-04.c | 20 +++++++++++++++++++ .../gcc.target/riscv/zbb-rol-ror-05.c | 10 ++++++++++ 2 files changed, 30 insertions(+)