diff mbox series

RISC-V: Remove testcase that cannot be compiled because VLEN limitation

Message ID 20230718065512.2728118-1-lehua.ding@rivai.ai
State New
Headers show
Series RISC-V: Remove testcase that cannot be compiled because VLEN limitation | expand

Commit Message

Lehua Ding July 18, 2023, 6:55 a.m. UTC
Hi,

Since the latter patch (https://gcc.gnu.org/pipermail/gcc-patches/2023-July/624689.html)
forbidden VLEN > 4096, the testcase attribute-20.c is no long need. This is obvious.

Best,
Lehua

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/attribute-20.c: Removed.

---
 gcc/testsuite/gcc.target/riscv/attribute-20.c | 7 -------
 1 file changed, 7 deletions(-)
 delete mode 100644 gcc/testsuite/gcc.target/riscv/attribute-20.c

Comments

钟居哲 July 18, 2023, 6:55 a.m. UTC | #1
OK



juzhe.zhong@rivai.ai
 
From: Lehua Ding
Date: 2023-07-18 14:55
To: gcc-patches
CC: juzhe.zhong; rdapp.gcc; kito.cheng; palmer; jeffreyalaw
Subject: [PATCH] RISC-V: Remove testcase that cannot be compiled because VLEN limitation
Hi,
 
Since the latter patch (https://gcc.gnu.org/pipermail/gcc-patches/2023-July/624689.html)
forbidden VLEN > 4096, the testcase attribute-20.c is no long need. This is obvious.
 
Best,
Lehua
 
gcc/testsuite/ChangeLog:
 
* gcc.target/riscv/attribute-20.c: Removed.
 
---
gcc/testsuite/gcc.target/riscv/attribute-20.c | 7 -------
1 file changed, 7 deletions(-)
delete mode 100644 gcc/testsuite/gcc.target/riscv/attribute-20.c
 
diff --git a/gcc/testsuite/gcc.target/riscv/attribute-20.c b/gcc/testsuite/gcc.target/riscv/attribute-20.c
deleted file mode 100644
index f7d0b29b71c..00000000000
--- a/gcc/testsuite/gcc.target/riscv/attribute-20.c
+++ /dev/null
@@ -1,7 +0,0 @@
-/* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl65536b -mabi=lp64d" } */
-int foo()
-{
-}
-
-/* { dg-final { scan-assembler ".attribute arch, \"rv64i2p1_m2p0_a2p1_f2p2_d2p2_c2p0_v1p0_zicsr2p0_zifencei2p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl1024b1p0_zvl128b1p0_zvl16384b1p0_zvl2048b1p0_zvl256b1p0_zvl32768b1p0_zvl32b1p0_zvl4096b1p0_zvl512b1p0_zvl64b1p0_zvl65536b1p0_zvl8192b1p0\"" } } */
Lehua Ding July 18, 2023, 7:03 a.m. UTC | #2
Committed to the trunk, thank you.



 




------------------ Original ------------------
From:                                                                                                                        "juzhe.zhong@rivai.ai"                                                                                    <juzhe.zhong@rivai.ai&gt;;
Date:&nbsp;Tue, Jul 18, 2023 02:55 PM
To:&nbsp;"丁乐华"<lehua.ding@rivai.ai&gt;;"gcc-patches"<gcc-patches@gcc.gnu.org&gt;;
Cc:&nbsp;"Robin Dapp"<rdapp.gcc@gmail.com&gt;;"kito.cheng"<kito.cheng@gmail.com&gt;;"palmer"<palmer@rivosinc.com&gt;;"jeffreyalaw"<jeffreyalaw@gmail.com&gt;;
Subject:&nbsp;Re: [PATCH] RISC-V: Remove testcase that cannot be compiled because VLEN limitation



OK



juzhe.zhong@rivai.ai
&nbsp;
From: Lehua Ding
Date: 2023-07-18 14:55
To: gcc-patches
CC: juzhe.zhong; rdapp.gcc; kito.cheng; palmer; jeffreyalaw
Subject: [PATCH] RISC-V: Remove testcase that cannot be compiled because VLEN limitation
Hi,
&nbsp;
Since the latter patch (https://gcc.gnu.org/pipermail/gcc-patches/2023-July/624689.html)
forbidden VLEN &gt; 4096, the testcase attribute-20.c is no long need. This is obvious.
&nbsp;
Best,
Lehua
&nbsp;
gcc/testsuite/ChangeLog:
&nbsp;
* gcc.target/riscv/attribute-20.c: Removed.
&nbsp;
---
gcc/testsuite/gcc.target/riscv/attribute-20.c | 7 -------
1 file changed, 7 deletions(-)
delete mode 100644 gcc/testsuite/gcc.target/riscv/attribute-20.c
&nbsp;
diff --git a/gcc/testsuite/gcc.target/riscv/attribute-20.c b/gcc/testsuite/gcc.target/riscv/attribute-20.c
deleted file mode 100644
index f7d0b29b71c..00000000000
--- a/gcc/testsuite/gcc.target/riscv/attribute-20.c
+++ /dev/null
@@ -1,7 +0,0 @@
-/* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl65536b -mabi=lp64d" } */
-int foo()
-{
-}
-
-/* { dg-final { scan-assembler ".attribute arch, \"rv64i2p1_m2p0_a2p1_f2p2_d2p2_c2p0_v1p0_zicsr2p0_zifencei2p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl1024b1p0_zvl128b1p0_zvl16384b1p0_zvl2048b1p0_zvl256b1p0_zvl32768b1p0_zvl32b1p0_zvl4096b1p0_zvl512b1p0_zvl64b1p0_zvl65536b1p0_zvl8192b1p0\"" } } */
diff mbox series

Patch

diff --git a/gcc/testsuite/gcc.target/riscv/attribute-20.c b/gcc/testsuite/gcc.target/riscv/attribute-20.c
deleted file mode 100644
index f7d0b29b71c..00000000000
--- a/gcc/testsuite/gcc.target/riscv/attribute-20.c
+++ /dev/null
@@ -1,7 +0,0 @@ 
-/* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl65536b -mabi=lp64d" } */
-int foo()
-{
-}
-
-/* { dg-final { scan-assembler ".attribute arch, \"rv64i2p1_m2p0_a2p1_f2p2_d2p2_c2p0_v1p0_zicsr2p0_zifencei2p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl1024b1p0_zvl128b1p0_zvl16384b1p0_zvl2048b1p0_zvl256b1p0_zvl32768b1p0_zvl32b1p0_zvl4096b1p0_zvl512b1p0_zvl64b1p0_zvl65536b1p0_zvl8192b1p0\"" } } */