@@ -2874,19 +2874,36 @@ (define_insn "sse3_h<insn>v4sf3"
(set_attr "prefix_rep" "1,*")
(set_attr "mode" "V4SF")])
-(define_mode_iterator REDUC_SSE_PLUS_MODE
- [(V2DF "TARGET_SSE") (V4SF "TARGET_SSE")])
+(define_expand "reduc_plus_scal_v4sf"
+ [(plus:V4SF
+ (match_operand:SF 0 "register_operand")
+ (match_operand:V4SF 1 "register_operand"))]
+ "TARGET_SSE"
+{
+ rtx vtmp = gen_reg_rtx (V4SFmode);
+ rtx stmp = gen_reg_rtx (SFmode);
+ if (TARGET_SSE3)
+ emit_insn (gen_sse3_movshdup (vtmp, operands[1]));
+ else
+ emit_insn (gen_sse_shufps (vtmp, operands[1], operands[1], GEN_INT(177)));
-(define_expand "reduc_plus_scal_<mode>"
- [(plus:REDUC_SSE_PLUS_MODE
- (match_operand:<ssescalarmode> 0 "register_operand")
- (match_operand:REDUC_SSE_PLUS_MODE 1 "register_operand"))]
- ""
+ emit_insn (gen_addv4sf3 (operands[1], operands[1], vtmp));
+ emit_insn (gen_sse_movhlps (vtmp, vtmp, operands[1]));
+ emit_insn (gen_vec_extractv4sfsf (stmp, vtmp, const0_rtx));
+ emit_insn (gen_vec_extractv4sfsf (operands[0], operands[1], const0_rtx));
+ emit_insn (gen_addsf3 (operands[0], operands[0], stmp));
+ DONE;
+})
+
+(define_expand "reduc_plus_scal_v2df"
+ [(plus:V2DF
+ (match_operand:DF 0 "register_operand")
+ (match_operand:V2DF 1 "register_operand"))]
+ "TARGET_SSE"
{
- rtx tmp = gen_reg_rtx (<MODE>mode);
- ix86_expand_reduc (gen_add<mode>3, tmp, operands[1]);
- emit_insn (gen_vec_extract<mode><ssescalarmodelower> (operands[0], tmp,
- const0_rtx));
+ rtx tmp = gen_reg_rtx (V2DFmode);
+ ix86_expand_reduc (gen_addv2df3, tmp, operands[1]);
+ emit_insn (gen_vec_extractv2dfdf (operands[0], tmp, const0_rtx));
DONE;
})
new file mode 100644
@@ -0,0 +1,32 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -ffast-math -msse2" } */
+/* { dg-require-effective-target sse2 } */
+
+#ifndef CHECK_H
+#define CHECK_H "sse2-check.h"
+#endif
+
+#ifndef TEST
+#define TEST sse2_test
+#endif
+
+#include CHECK_H
+
+float
+__attribute__((noipa, optimize("tree-vectorize")))
+foo (float* p)
+{
+ float sum = 0.f;
+ for (int i = 0; i != 4; i++)
+ sum += p[i];
+ return sum;
+}
+
+static void
+TEST (void)
+{
+ float p[4] = {1.0f, 2.0f, 3.0f, 4.0f};
+ float res = foo (p);
+ if (res != 10.0f)
+ abort();
+}
new file mode 100644
@@ -0,0 +1,13 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -ffast-math -msse3" } */
+/* { dg-require-effective-target sse3 } */
+
+#ifndef CHECK_H
+#define CHECK_H "sse3-check.h"
+#endif
+
+#ifndef TEST
+#define TEST sse3_test
+#endif
+
+#include "sse2-pr101059.c"
Hi: The optimization is decribled in PR. The two instruction sequences are almost as fast, but the optimized instruction sequences could be one mov instruction less on sse2 and 2 mov instruction less on sse3. Bootstrapped and regtested on x86_64-linux-gnu{-m32,}. gcc/ChangeLog: PR target/101059 * config/i386/sse.md (reduc_plus_scal_<mode>): Split to .. (reduc_plus_scal_v4sf): .. this, New define_expand. (reduc_plus_scal_v2df): .. and this, New define_expand. gcc/testsuite/ChangeLog: PR target/101059 * gcc.target/i386/sse2-pr101059.c: New test. * gcc.target/i386/sse3-pr101059.c: New test. --- gcc/config/i386/sse.md | 39 +++++++++++++------ gcc/testsuite/gcc.target/i386/sse2-pr101059.c | 32 +++++++++++++++ gcc/testsuite/gcc.target/i386/sse3-pr101059.c | 13 +++++++ 3 files changed, 73 insertions(+), 11 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/sse2-pr101059.c create mode 100644 gcc/testsuite/gcc.target/i386/sse3-pr101059.c