Message ID | 20111003230055.GA27052@intel.com |
---|---|
State | New |
Headers | show |
On Tue, Oct 4, 2011 at 1:00 AM, H.J. Lu <hongjiu.lu@intel.com> wrote: > This patch improves address combine for x32 by forcing the memory memory > operand of PLUS operation into register. Tested on Linux/x86-64 with > -mx32. OK for trunk? Does the patch fix FAIL: gcc.target/i386/pr45670.c scan-assembler-not lea[lq] on x32 ? Uros.
On 10/04/2011 01:00 AM, H.J. Lu wrote: > + else > + { > + /* Improve address combine in x32 mode. */ > + if (TARGET_X32 > + && code == PLUS > + && !MEM_P (dst) > + && !MEM_P (src1) > + && MEM_P (src2) ) > + src2 = force_reg (mode, src2); > + } Perhaps this is worthwhile also on non-x32? Paolo
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 9b079af..922f691 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -15713,6 +15713,16 @@ ix86_fixup_binary_operands (enum rtx_code code, enum machine_mode mode, else src2 = force_reg (mode, src2); } + else + { + /* Improve address combine in x32 mode. */ + if (TARGET_X32 + && code == PLUS + && !MEM_P (dst) + && !MEM_P (src1) + && MEM_P (src2) ) + src2 = force_reg (mode, src2); + } /* If the destination is memory, and we do not have matching source operands, do things in registers. */