Message ID | 00a201d9bca7$4739a220$d5ace660$@nextmovesoftware.com |
---|---|
State | New |
Headers | show |
Series | [x86] Don't use insvti_{high, low}part with -O0 (for compile-time). | expand |
On Sat, Jul 22, 2023 at 4:17 PM Roger Sayle <roger@nextmovesoftware.com> wrote: > > > This patch attempts to help with PR rtl-optimization/110587, a regression > of -O0 compile time for the pathological pr28071.c. My recent patch helps > a bit, but hasn't returned -O0 compile-time to where it was before my > ix86_expand_move changes. The obvious solution/workaround is to guard > these new TImode parameter passing optimizations with "&& optimize", so > they don't trigger when compiling with -O0. The very minor complication > is that "&& optimize" alone leads to the regression of pr110533.c, where > our improved TImode parameter passing fixes a wrong-code issue with naked > functions, importantly, when compiling with -O0. This should explain > the one line fix below "&& (optimize || ix86_function_naked (cfun))". > > I've an additional fix/tweak or two for this compile-time issue, but > this change eliminates the part of the regression that I've caused. > > This patch has been tested on x86_64-pc-linux-gnu with make bootstrap > and make -k check, both with and without --target_board=unix{-m32} > with no new failures. Ok for mainline? > > 2023-07-22 Roger Sayle <roger@nextmovesoftware.com> > > gcc/ChangeLog > * config/i386/i386-expand.cc (ix86_expand_move): Disable the > 64-bit insertions into TImode optimizations with -O0, unless > the function has the "naked" attribute (for PR target/110533). LGTM, but please add some comments, why only when optimizing (please mention PR110587) and especially mention PR110533 on why the naked attribute is allowed. Thanks, Uros. > Cheers, > Roger > -- >
diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc index 7e94447..cdef95e 100644 --- a/gcc/config/i386/i386-expand.cc +++ b/gcc/config/i386/i386-expand.cc @@ -544,6 +544,7 @@ ix86_expand_move (machine_mode mode, rtx operands[]) /* Special case inserting 64-bit values into a TImode register. */ if (TARGET_64BIT + && (optimize || ix86_function_naked (current_function_decl)) && (mode == DImode || mode == DFmode) && SUBREG_P (op0) && GET_MODE (SUBREG_REG (op0)) == TImode