Show patches with: Submitter = Roger Sayle       |    State = Action Required       |    Archived = No       |   461 patches
« 1 2 3 44 5 »
Patch Series A/F/R/T S/W/F Date Submitter Delegate State
Implement a -ftrapping-math/-fsignaling-nans TODO in match.pd. Implement a -ftrapping-math/-fsignaling-nans TODO in match.pd. - - - - --- 2024-07-17 Roger Sayle New
[x86] Tweak i386-expand.cc to restore bootstrap on RHEL. [x86] Tweak i386-expand.cc to restore bootstrap on RHEL. - - - - --- 2024-07-14 Roger Sayle New
[match.pd] PR tree-optimization/114661: Generalize MULT_EXPR recognition (take #2) [match.pd] PR tree-optimization/114661: Generalize MULT_EXPR recognition (take #2) - - - - --- 2024-07-14 Roger Sayle New
[x86,SSE] Some AVX512 ternlog expansion refinements (take #2) [x86,SSE] Some AVX512 ternlog expansion refinements (take #2) - - - - --- 2024-07-11 Roger Sayle New
[ARC] Improve performance of SImode right shifts. [ARC] Improve performance of SImode right shifts. - - - - --- 2024-07-11 Roger Sayle New
[nvptx] Implement rtx_costs target hook for nvptx backend. [nvptx] Implement rtx_costs target hook for nvptx backend. - - - - --- 2024-07-11 Roger Sayle New
[match.pd] PR tree-optimization/114661: Generalize MULT_EXPR recognition. [match.pd] PR tree-optimization/114661: Generalize MULT_EXPR recognition. - - - - --- 2024-07-09 Roger Sayle New
[x86,SSE] Some AVX512 ternlog expansion refinements. [x86,SSE] Some AVX512 ternlog expansion refinements. - - - - --- 2024-07-07 Roger Sayle New
[x86,SSE] PR target/115751: Avoid force_reg in ix86_expand_ternlog. [x86,SSE] PR target/115751: Avoid force_reg in ix86_expand_ternlog. - - - - --- 2024-07-04 Roger Sayle New
[x86] Add additional variant of bswaphisi2_lowpart peephole2. [x86] Add additional variant of bswaphisi2_lowpart peephole2. - - - - --- 2024-07-01 Roger Sayle New
[x86,SSE] Remove legacy ternlog patterns from sse.md [x86,SSE] Remove legacy ternlog patterns from sse.md - - - - --- 2024-06-30 Roger Sayle New
[testsuite] Fix -m32 gcc.target/i386/pr102464-vrndscaleph.c on RedHat. [testsuite] Fix -m32 gcc.target/i386/pr102464-vrndscaleph.c on RedHat. - - - - --- 2024-06-30 Roger Sayle New
[x86] : Additional peephole2 to use lea in round-up integer division. [x86] : Additional peephole2 to use lea in round-up integer division. - - - - --- 2024-06-29 Roger Sayle New
[x86] Handle sign_extend like zero_extend in *concatditi3_[346] [x86] Handle sign_extend like zero_extend in *concatditi3_[346] - - - - --- 2024-06-27 Roger Sayle New
[x86,SSE] Some additional ternlog refinements. [x86,SSE] Some additional ternlog refinements. - - - - --- 2024-06-27 Roger Sayle New
[ARC] Improved SImode conditional moves (improves DImode shifts). [ARC] Improved SImode conditional moves (improves DImode shifts). - - - - --- 2024-06-22 Roger Sayle New
[v2] PR tree-opt/113673: Avoid load merging when potentially trapping. [v2] PR tree-opt/113673: Avoid load merging when potentially trapping. - - - - --- 2024-06-21 Roger Sayle New
[x86] Allow all register_operand SUBREGs in x86_ternlog_idx. [x86] Allow all register_operand SUBREGs in x86_ternlog_idx. - - - - --- 2024-06-18 Roger Sayle New
[x86] More use of m{32,64}bcst addressing modes with ternlog. [x86] More use of m{32,64}bcst addressing modes with ternlog. - - - - --- 2024-06-12 Roger Sayle New
[x86] PR target/115397: AVX512 ternlog vs. -m32 -fPIC constant pool. [x86] PR target/115397: AVX512 ternlog vs. -m32 -fPIC constant pool. - - - - --- 2024-06-10 Roger Sayle New
[analyzer] Restore bootstrap with g++ 4.8. [analyzer] Restore bootstrap with g++ 4.8. - - - - --- 2024-06-07 Roger Sayle New
[x86] PR target/115351: RTX costs for *concatditi3 and *insvti_highpart. [x86] PR target/115351: RTX costs for *concatditi3 and *insvti_highpart. - - - - --- 2024-06-07 Roger Sayle New
[x86,SSE] Improve handling of ternlog instructions in i386/sse.md (v3) [x86,SSE] Improve handling of ternlog instructions in i386/sse.md (v3) - - - - --- 2024-06-06 Roger Sayle New
[x86_64] Correct insn_cost of movabsq. [x86_64] Correct insn_cost of movabsq. - - - - --- 2024-05-22 Roger Sayle New
Avoid ICE in except.cc on targets that don't support exceptions. Avoid ICE in except.cc on targets that don't support exceptions. - - - - --- 2024-05-22 Roger Sayle New
[x86,SSE] Improve handling of ternlog instructions in i386/sse.md (v2) [x86,SSE] Improve handling of ternlog instructions in i386/sse.md (v2) - - - - --- 2024-05-17 Roger Sayle New
[x86,SSE] Improve handling of ternlog instructions in i386/sse.md [x86,SSE] Improve handling of ternlog instructions in i386/sse.md - - - - --- 2024-05-12 Roger Sayle New
[x86] Improve V[48]QI shifts on AVX512 [x86] Improve V[48]QI shifts on AVX512 - - - - --- 2024-05-09 Roger Sayle New
[C] PR c/109618: ICE-after-error from error_mark_node. [C] PR c/109618: ICE-after-error from error_mark_node. - - - - --- 2024-04-29 Roger Sayle New
PR tree-opt/113673: Avoid load merging from potentially trapping additions. PR tree-opt/113673: Avoid load merging from potentially trapping additions. - - - - --- 2024-04-28 Roger Sayle New
PR middle-end/111701: signbit(x*x) vs -fsignaling-nans PR middle-end/111701: signbit(x*x) vs -fsignaling-nans - - - - --- 2024-04-26 Roger Sayle New
PR target/114187: Fix ?Fmode SUBREG simplification in simplify_subreg. PR target/114187: Fix ?Fmode SUBREG simplification in simplify_subreg. - - - - --- 2024-03-03 Roger Sayle New
[x86_64] PR target/113690: Fix-up MULT REG_EQUAL notes in STV. [x86_64] PR target/113690: Fix-up MULT REG_EQUAL notes in STV. - - - - --- 2024-02-05 Roger Sayle New
[tree-ssa] PR target/113560: Enhance is_widening_mult_rhs_p. [tree-ssa] PR target/113560: Enhance is_widening_mult_rhs_p. - - - - --- 2024-01-30 Roger Sayle New
[libatomic] PR other/113336: Fix libatomic testsuite regressions on ARM. [libatomic] PR other/113336: Fix libatomic testsuite regressions on ARM. - - - - --- 2024-01-28 Roger Sayle New
[middle-end] Constant fold {-1,-1} << 1 in simplify-rtx.cc [middle-end] Constant fold {-1,-1} << 1 in simplify-rtx.cc - - - - --- 2024-01-26 Roger Sayle New
[middle-end] Prefer PLUS over IOR in RTL expansion of multi-word shifts/rotates. [middle-end] Prefer PLUS over IOR in RTL expansion of multi-word shifts/rotates. - - - - --- 2024-01-18 Roger Sayle New
[x86] PR target/106060: Improved SSE vector constant materialization. [x86] PR target/106060: Improved SSE vector constant materialization. - - - - --- 2024-01-16 Roger Sayle New
PR rtl-optimization/111267: Improved forward propagation. PR rtl-optimization/111267: Improved forward propagation. - - - - --- 2024-01-16 Roger Sayle New
[PATCH/RFC] Add --with-dwarf4 configure option. [PATCH/RFC] Add --with-dwarf4 configure option. - - - - --- 2024-01-14 Roger Sayle New
[libatomic] Fix testsuite regressions on ARM [raspberry pi]. [libatomic] Fix testsuite regressions on ARM [raspberry pi]. - - - - --- 2024-01-08 Roger Sayle New
[x86] PR target/113231: Improved costs in Scalar-To-Vector (STV) pass. [x86] PR target/113231: Improved costs in Scalar-To-Vector (STV) pass. - - - - --- 2024-01-06 Roger Sayle New
[middle-end,take,#2] Only call targetm.truly_noop_truncation for truncations. [middle-end,take,#2] Only call targetm.truly_noop_truncation for truncations. - - - - --- 2023-12-31 Roger Sayle New
[middle-end] Only call targetm.truly_noop_truncation for truncations. [middle-end] Only call targetm.truly_noop_truncation for truncations. - - - - --- 2023-12-28 Roger Sayle New
Improved RTL expansion of field assignments into promoted registers. Improved RTL expansion of field assignments into promoted registers. - - - - --- 2023-12-28 Roger Sayle New
[ARC] Table-driven ashlsi implementation for better code/rtx_costs. [ARC] Table-driven ashlsi implementation for better code/rtx_costs. - - - - --- 2023-12-23 Roger Sayle New
[x86_64] PR target/112992: Optimize mode for broadcast of constants. [x86_64] PR target/112992: Optimize mode for broadcast of constants. - - - - --- 2023-12-22 Roger Sayle New
[x86_PATCH] peephole2 to resolve failure of gcc.target/i386/pr43644-2.c [x86_PATCH] peephole2 to resolve failure of gcc.target/i386/pr43644-2.c - - - - --- 2023-12-22 Roger Sayle New
[x86] Improved TImode (128-bit) integer constants on x86_64. [x86] Improved TImode (128-bit) integer constants on x86_64. - - - - --- 2023-12-18 Roger Sayle New
[ARC] Add *extvsi_n_0 define_insn_and_split for PR 110717. [ARC] Add *extvsi_n_0 define_insn_and_split for PR 110717. - - - - --- 2023-12-05 Roger Sayle New
Workaround array_slice constructor portability issues (with older g++). Workaround array_slice constructor portability issues (with older g++). - - - - --- 2023-12-03 Roger Sayle New
[RISC-V] Improve style to work around PR 60994 in host compiler. [RISC-V] Improve style to work around PR 60994 in host compiler. - - - - --- 2023-12-01 Roger Sayle New
PR112380: Defend against CLOBBERs in RTX expressions in combine.cc PR112380: Defend against CLOBBERs in RTX expressions in combine.cc - - - - --- 2023-11-12 Roger Sayle New
[x86] Improve reg pressure of double-word right-shift then truncate. [x86] Improve reg pressure of double-word right-shift then truncate. - - - - --- 2023-11-12 Roger Sayle New
[ARC] Consistent use of whitespace in assembler templates. [ARC] Consistent use of whitespace in assembler templates. - - - - --- 2023-11-06 Roger Sayle New
[ARC] Improved DImode rotates and right shifts by one bit. [ARC] Improved DImode rotates and right shifts by one bit. - - - - --- 2023-11-06 Roger Sayle New
[ARC] Provide a TARGET_FOLD_BUILTIN target hook. [ARC] Provide a TARGET_FOLD_BUILTIN target hook. - - - - --- 2023-11-03 Roger Sayle New
[AVR] Improvements to SImode and PSImode shifts by constants. [AVR] Improvements to SImode and PSImode shifts by constants. - - - - --- 2023-11-02 Roger Sayle New
[AVR] Optimize (X>>C)&1 for C in [1, 4, 8, 16, 24] in *insv.any_shift.<mode>. [AVR] Optimize (X>>C)&1 for C in [1, 4, 8, 16, 24] in *insv.any_shift.<mode>. - - - - --- 2023-11-02 Roger Sayle New
[x86_64] PR target/110551: Tweak mulx register allocation using peephole2. [x86_64] PR target/110551: Tweak mulx register allocation using peephole2. - - - - --- 2023-10-30 Roger Sayle New
[ARC] Improved ARC rtx_costs/insn_cost for SHIFTs and ROTATEs. [ARC] Improved ARC rtx_costs/insn_cost for SHIFTs and ROTATEs. - - - - --- 2023-10-29 Roger Sayle New
[ARC] Convert (signed<<31)>>31 to -(signed&1) without barrel shifter. [ARC] Convert (signed<<31)>>31 to -(signed&1) without barrel shifter. - - - - --- 2023-10-28 Roger Sayle New
[ARC] Improve DImode left shift by a single bit. [ARC] Improve DImode left shift by a single bit. - - - - --- 2023-10-28 Roger Sayle New
[wwwdocs] Get newlib via git in simtest-howto.html [wwwdocs] Get newlib via git in simtest-howto.html - - - - --- 2023-10-27 Roger Sayle New
[ARC] Improved SImode shifts and rotates with -mswap. [ARC] Improved SImode shifts and rotates with -mswap. - - - - --- 2023-10-27 Roger Sayle New
[v2] PR 91865: Avoid ZERO_EXTEND of ZERO_EXTEND in make_compound_operation. [v2] PR 91865: Avoid ZERO_EXTEND of ZERO_EXTEND in make_compound_operation. - - - - --- 2023-10-25 Roger Sayle New
[x86] Fine tune STV register conversion costs for -Os. [x86] Fine tune STV register conversion costs for -Os. - - - - --- 2023-10-23 Roger Sayle New
[x86] PR target/110511: Fix reg allocation for widening multiplications. [x86] PR target/110511: Fix reg allocation for widening multiplications. - - - - --- 2023-10-17 Roger Sayle New
[x86] PR 106245: Split (x<<31)>>31 as -(x&1) in i386.md [x86] PR 106245: Split (x<<31)>>31 as -(x&1) in i386.md - - - - --- 2023-10-17 Roger Sayle New
Improved RTL expansion of 1LL << x. Improved RTL expansion of 1LL << x. - - - - --- 2023-10-14 Roger Sayle New
PR 91865: Avoid ZERO_EXTEND of ZERO_EXTEND in make_compound_operation. PR 91865: Avoid ZERO_EXTEND of ZERO_EXTEND in make_compound_operation. - - - - --- 2023-10-14 Roger Sayle New
Optimize (ne:SI (subreg:QI (ashift:SI x 7) 0) 0) as (and:SI x 1). Optimize (ne:SI (subreg:QI (ashift:SI x 7) 0) 0) as (and:SI x 1). - - - - --- 2023-10-10 Roger Sayle New
[ARC] Improved SImode shifts and rotates on !TARGET_BARREL_SHIFTER. [ARC] Improved SImode shifts and rotates on !TARGET_BARREL_SHIFTER. - - - - --- 2023-10-08 Roger Sayle New
[X86] Split lea into shorter left shift by 2 or 3 bits with -Oz. [X86] Split lea into shorter left shift by 2 or 3 bits with -Oz. - - - - --- 2023-10-05 Roger Sayle New
Support g++ 4.8 as a host compiler. Support g++ 4.8 as a host compiler. - - - - --- 2023-10-04 Roger Sayle New
[ARC] Use rlc r0, 0 to implement scc_ltu (i.e. carry_flag ? 1 : 0) [ARC] Use rlc r0, 0 to implement scc_ltu (i.e. carry_flag ? 1 : 0) - - - - --- 2023-09-29 Roger Sayle New
[ARC] Split SImode shifts pre-reload on !TARGET_BARREL_SHIFTER. [ARC] Split SImode shifts pre-reload on !TARGET_BARREL_SHIFTER. - - - - --- 2023-09-28 Roger Sayle New
PR target/107671: Make more use of btl/btq on x86_64. PR target/107671: Make more use of btl/btq on x86_64. - - - - --- 2023-08-07 Roger Sayle New
[Committed] Avoid FAIL of gcc.target/i386/pr110792.c [Committed] Avoid FAIL of gcc.target/i386/pr110792.c - - - - --- 2023-08-06 Roger Sayle New
Specify signed/unsigned/dontcare in calls to extract_bit_field_1. Specify signed/unsigned/dontcare in calls to extract_bit_field_1. - - - - --- 2023-08-03 Roger Sayle New
[x86] Split SUBREGs of SSE vector registers into vec_select insns. [x86] Split SUBREGs of SSE vector registers into vec_select insns. - - - - --- 2023-08-03 Roger Sayle New
[x86] PR target/110792: Early clobber issues with rot32di2_doubleword. [x86] PR target/110792: Early clobber issues with rot32di2_doubleword. - - - - --- 2023-08-02 Roger Sayle New
[Committed] PR target/110843: Check TARGET_AVX512VL for V2DI rotates in STV. [Committed] PR target/110843: Check TARGET_AVX512VL for V2DI rotates in STV. - - - - --- 2023-07-31 Roger Sayle New
[Committed] Use QImode for offsets in zero_extract/sign_extract in i386.md (take #2) [Committed] Use QImode for offsets in zero_extract/sign_extract in i386.md (take #2) - - - - --- 2023-07-29 Roger Sayle New
PR rtl-optimization/110701: Fix SUBREG SET_DEST handling in combine. PR rtl-optimization/110701: Fix SUBREG SET_DEST handling in combine. - - - - --- 2023-07-26 Roger Sayle New
PR rtl-optimization/110587: Reduce useless moves in compile-time hog. PR rtl-optimization/110587: Reduce useless moves in compile-time hog. - - - - --- 2023-07-25 Roger Sayle New
[Committed] PR target/110787: Revert QImode offsets in {zero, sign}_extract. [Committed] PR target/110787: Revert QImode offsets in {zero, sign}_extract. - - - - --- 2023-07-24 Roger Sayle New
Replace lra-spill.cc's return_regno_p with return_reg_p. Replace lra-spill.cc's return_regno_p with return_reg_p. - - - - --- 2023-07-22 Roger Sayle New
[x86] Use QImode for offsets in zero_extract/sign_extract in i386.md [x86] Use QImode for offsets in zero_extract/sign_extract in i386.md - - - - --- 2023-07-22 Roger Sayle New
[x86] Don't use insvti_{high, low}part with -O0 (for compile-time). [x86] Don't use insvti_{high, low}part with -O0 (for compile-time). - - - - --- 2023-07-22 Roger Sayle New
PR c/110699: Defend against error_mark_node in gimplify.cc. PR c/110699: Defend against error_mark_node in gimplify.cc. - - - - --- 2023-07-19 Roger Sayle New
[x86_64] More TImode parameter passing improvements. [x86_64] More TImode parameter passing improvements. - - - - --- 2023-07-19 Roger Sayle New
Fix bootstrap failure (with g++ 4.8.5) in tree-if-conv.cc. Fix bootstrap failure (with g++ 4.8.5) in tree-if-conv.cc. - - - - --- 2023-07-14 Roger Sayle New
[x86] PR target/110588: Add *bt<mode>_setncqi_2 to generate btl [x86] PR target/110588: Add *bt<mode>_setncqi_2 to generate btl - - - - --- 2023-07-13 Roger Sayle New
[x86_64] Improved insv of DImode/DFmode {high, low}parts into TImode. [x86_64] Improved insv of DImode/DFmode {high, low}parts into TImode. - - - - --- 2023-07-13 Roger Sayle New
[x86] Fix FAIL of gcc.target/i386/pr91681-1.c [x86] Fix FAIL of gcc.target/i386/pr91681-1.c - - - - --- 2023-07-11 Roger Sayle New
[x86] PR target/110598: Fix rega = 0; rega ^= rega regression. [x86] PR target/110598: Fix rega = 0; rega ^= rega regression. - - - - --- 2023-07-11 Roger Sayle New
[X86] Add new insvti_lowpart_1 and insvdi_lowpart_1 patterns. [X86] Add new insvti_lowpart_1 and insvdi_lowpart_1 patterns. - - - - --- 2023-07-09 Roger Sayle New
[x86] Add AVX512 support for STV of SI/DImode rotation by constant. [x86] Add AVX512 support for STV of SI/DImode rotation by constant. - - - - --- 2023-07-09 Roger Sayle New
[x86_64] Improve __int128 argument passing (in ix86_expand_move). [x86_64] Improve __int128 argument passing (in ix86_expand_move). - - - - --- 2023-07-06 Roger Sayle New
« 1 2 3 44 5 »