Show patches with: Submitter = Michael Meissner       |    State = Action Required       |    Archived = No       |   700 patches
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Patch Series A/F/R/T S/W/F Date Submitter Delegate State
[7/11,V2] Add BF/HF negate and absolute value operations Untitled series #487554 - - - - --- 2026-01-07 Michael Meissner New
[V12] , Add -mcpu=future to the PowerPC [V12] , Add -mcpu=future to the PowerPC - - - - --- 2025-12-16 Michael Meissner New
[V11] Add -mcpu=future to the PowerPC [V11] Add -mcpu=future to the PowerPC - - - - --- 2025-12-11 Michael Meissner New
Enable using load/store vector pairs for memory operations with the -mcpu=future PowerPC option Enable using load/store vector pairs for memory operations with the -mcpu=future PowerPC option - - - - --- 2025-12-05 Michael Meissner New
[V10] Add -mcpu=future to the PowerPC [V10] Add -mcpu=future to the PowerPC - - - - --- 2025-12-05 Michael Meissner New
[V9,2,of,2] Use vector pair load/store for -mcpu=future [V9,2,of,2] Use vector pair load/store for -mcpu=future - - - - --- 2025-11-25 Michael Meissner New
[V9,1,of,2] Add -mcpu=future to the PowerPC [V9,1,of,2] Add -mcpu=future to the PowerPC - - - - --- 2025-11-25 Michael Meissner New
[6/6] PR target/118541 do not generate floating point cmoves for IEEE compares Various PowerPC PRs - - - - --- 2025-11-15 Michael Meissner New
[5/6] PR target/12068 allow -mcmodel=large with PC relative addressing Various PowerPC PRs - - - - --- 2025-11-15 Michael Meissner New
[4/6] PR target/108958 simplify mtvsrdd to zero extend GPR DImode to VSX TImode Various PowerPC PRs - - - - --- 2025-11-15 Michael Meissner New
[3/6] PR target/120528 Simplify zero extend from memory to VSX register on power10 Various PowerPC PRs - - - - --- 2025-11-15 Michael Meissner New
[2/6] PR target/99293 Optimize splat of a V2DF/V2DI extract with constant element Various PowerPC PRs - - - - --- 2025-11-15 Michael Meissner New
[1/6] Add power9 and power10 float to logical optimizations Various PowerPC PRs - - - - --- 2025-11-15 Michael Meissner New
[11/11] Add _Float16 and __bfloat16 tests. Add PowerPC 16-bit experimental support - - - - --- 2025-11-14 Michael Meissner New
[10/11] Add --with-powerpc-float16 and --with-powerpc-float16-disable-warning. Add PowerPC 16-bit experimental support - - - - --- 2025-11-14 Michael Meissner New
[9/11] Optimize __bfloat16 scalar code. Add PowerPC 16-bit experimental support - - - - --- 2025-11-14 Michael Meissner New
[8/11] Add 16-bit floating point vectorization. Add PowerPC 16-bit experimental support - - - - --- 2025-11-14 Michael Meissner New
[7/11] Add BF/HF negate and absolute value operations and logical insns. Add PowerPC 16-bit experimental support - - - - --- 2025-11-14 Michael Meissner New
[6/11] Add conversions between 16-bit floating point and other scalar modes. Add PowerPC 16-bit experimental support - - - - --- 2025-11-14 Michael Meissner New
[5/11] Add conversions between __bfloat16 and float/double. Add PowerPC 16-bit experimental support - - - - --- 2025-11-14 Michael Meissner New
[4/11] Add conversions between _Float16 and float/double. Add PowerPC 16-bit experimental support - - - - --- 2025-11-14 Michael Meissner New
[3/11] Add HF/BF emulation functions to libgcc. Add PowerPC 16-bit experimental support - - - - --- 2025-11-14 Michael Meissner New
[2/11] Add initial 16-bit floating point support. Add PowerPC 16-bit experimental support - - - - --- 2025-11-14 Michael Meissner New
[1/11] Add infrastructure for _Float16 and __bfloat16 types. Add PowerPC 16-bit experimental support - - - - --- 2025-11-14 Michael Meissner New
[V2,3/3] Add support for 1,024 bit DMF registers on a future PowerPC. Add Dense Math support as a possible PowerPC extension - - - - --- 2025-11-14 Michael Meissner New
[V2,2/3] Add support for dense math registers on a future PowerPC Add Dense Math support as a possible PowerPC extension - - - - --- 2025-11-14 Michael Meissner New
[V2,1/3] Add wD constraint. Add Dense Math support as a possible PowerPC extension - - - - --- 2025-11-14 Michael Meissner New
[V8,2/2] Use vector pair load/store for -mcpu=future Add -mcpu=future to the PowerPC - - - - --- 2025-11-14 Michael Meissner New
[V8,1/2] Add -mcpu=future to the PowerPC Add -mcpu=future to the PowerPC - - - - --- 2025-11-14 Michael Meissner New
[3/3] Add support for 1,024 bit DMF registers to the PowerPC. Add Dense Math support as a possible PowerPC extension - - - - --- 2025-11-08 Michael Meissner New
[2/3] Add support for dense math registers to the PowerPC. Add Dense Math support as a possible PowerPC extension - - - - --- 2025-11-08 Michael Meissner New
[1/3] Add %wD constraint to the PowerPC Add Dense Math support as a possible PowerPC extension - - - - --- 2025-11-08 Michael Meissner New
[V7] Add -mcpu=future to the PowerPC [V7] Add -mcpu=future to the PowerPC - - - - --- 2025-11-07 Michael Meissner New
[V6] Add -mcpu=future suppor to the PowerPC [V6] Add -mcpu=future suppor to the PowerPC - - - - --- 2025-11-07 Michael Meissner New
RFC [PATCH 9/9] Document -mfloat16 RFC [PATCH 9/9] Document -mfloat16 - - - - --- 2025-11-05 Michael Meissner New
RFC [PATCH 8/9] Add 16-bit floating point vectorization. RFC [PATCH 8/9] Add 16-bit floating point vectorization. - - - - --- 2025-11-05 Michael Meissner New
RFC [PATCH 7/9] Add BF/HF neg, abs operands and logical insns. RFC [PATCH 7/9] Add BF/HF neg, abs operands and logical insns. - - - - --- 2025-11-05 Michael Meissner New
RFC [PATCH 6/9] Add conversions between 16-bit floating point and other RFC [PATCH 6/9] Add conversions between 16-bit floating point and other - - - - --- 2025-11-05 Michael Meissner New
RFC [PATCH 5/9] Add conversions between __bfloat16 and float/double RFC [PATCH 5/9] Add conversions between __bfloat16 and float/double - - - - --- 2025-11-05 Michael Meissner New
RFC [PATCH 4/9] Add conversions between _Float16 and float/double. RFC [PATCH 4/9] Add conversions between _Float16 and float/double. - - - - --- 2025-11-05 Michael Meissner New
RFC [PATCH 3/9] Add HF/BF emulation functions to libgcc. RFC [PATCH 3/9] Add HF/BF emulation functions to libgcc. - - - - --- 2025-11-05 Michael Meissner New
RFC [PATCH 2/9] Add initial 16-bit floating point support. RFC [PATCH 2/9] Add initial 16-bit floating point support. - - - - --- 2025-11-05 Michael Meissner New
RFC [PATCH 1/9] Add infrastructure for _Float16 and __bfloat16 types. RFC [PATCH 1/9] Add infrastructure for _Float16 and __bfloat16 types. - - - - --- 2025-11-05 Michael Meissner New
[V5,10/10] Use power7 CPU option for power7 support instead of -mpopcntd Reorganize PowerPC target support and add -mcpu=future - - - - --- 2025-09-22 Michael Meissner New
[V5,9/10] Remove -mpower8-internal support Reorganize PowerPC target support and add -mcpu=future - - - - --- 2025-09-22 Michael Meissner New
[V5,8/10] Remove internal -mpower9-misc support. Reorganize PowerPC target support and add -mcpu=future - - - - --- 2025-09-22 Michael Meissner New
[V5,7/10] Remove internal -mpower10 support. Reorganize PowerPC target support and add -mcpu=future - - - - --- 2025-09-22 Michael Meissner New
[V5,6/10] Remove internal -mpower11 support. Reorganize PowerPC target support and add -mcpu=future - - - - --- 2025-09-22 Michael Meissner New
[V5,5/10] Add -mcpu=future support. Reorganize PowerPC target support and add -mcpu=future - - - - --- 2025-09-22 Michael Meissner New
[V5,4/10] Move defining _ARCH_PWRx to use CPU options. Reorganize PowerPC target support and add -mcpu=future - - - - --- 2025-09-22 Michael Meissner New
[V5,3/10] Move setting the assembler .machine directive to use CPU options. Reorganize PowerPC target support and add -mcpu=future - - - - --- 2025-09-22 Michael Meissner New
[V5,2/10] Move clone attribute support to use CPU options. Reorganize PowerPC target support and add -mcpu=future - - - - --- 2025-09-22 Michael Meissner New
[V5,1/10] Add cpu option flag bits Reorganize PowerPC target support and add -mcpu=future - - - - --- 2025-09-22 Michael Meissner New
[V8] Fix PR 118541, do not generate unordered fp compares [V8] Fix PR 118541, do not generate unordered fp compares - - - - --- 2025-07-31 Michael Meissner New
[V4] Add -mcpu=future to the PowerPC [V4] Add -mcpu=future to the PowerPC - - - - --- 2025-07-23 Michael Meissner New
[V3] Add -mcpu=future to the PowerPC [V3] Add -mcpu=future to the PowerPC - - - - --- 2025-07-01 Michael Meissner New
[V2,3,of,3] Add -mcpu=future tests. [V2,3,of,3] Add -mcpu=future tests. - - - - --- 2025-06-25 Michael Meissner New
[V2,2,of,3] Add Add -mcpu=future tuning support. [V2,2,of,3] Add Add -mcpu=future tuning support. - - - - --- 2025-06-25 Michael Meissner New
[V2,1,of,3] Add -mcpu=future support. [V2,1,of,3] Add -mcpu=future support. - - - - --- 2025-06-25 Michael Meissner New
PR target/120681 - allow -mcmodel=large with PC relative addressing PR target/120681 - allow -mcmodel=large with PC relative addressing - - - - --- 2025-06-18 Michael Meissner New
[4,of,4] Use vector pair for memory operations with -mcpu=future [4,of,4] Use vector pair for memory operations with -mcpu=future - - - - --- 2025-06-14 Michael Meissner New
[3,of,4] Add -mcpu=future tests [3,of,4] Add -mcpu=future tests - - - - --- 2025-06-14 Michael Meissner New
[2,of,4] Add tuning support for -mcpu=future [2,of,4] Add tuning support for -mcpu=future - - - - --- 2025-06-14 Michael Meissner New
[1,of,4] Add -mcpu=future support for PowerPC [1,of,4] Add -mcpu=future support for PowerPC - - - - --- 2025-06-14 Michael Meissner New
[45/45,V2] PR target/117251: Add tests PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations - - - - --- 2025-06-11 Michael Meissner New
[44/45,V2] PR target/117251: Improve vector and to vector nand fusion PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations - - - - --- 2025-06-11 Michael Meissner New
[43/45,V2] PR target/117251: Improve vector andc to vector nand fusion PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations - - - - --- 2025-06-11 Michael Meissner New
[42/45,V2] PR target/117251: Improve vector xor to vector nand fusion PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations - - - - --- 2025-06-11 Michael Meissner New
[41/45,V2] PR target/117251: Improve vector or to vector nand fusion PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations - - - - --- 2025-06-11 Michael Meissner New
[40/45,V2] PR target/117251: Improve vector nor to vector nand fusion PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations - - - - --- 2025-06-11 Michael Meissner New
[39/45,V2] PR target/117251: Improve vector eqv to vector nand fusion PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations - - - - --- 2025-06-11 Michael Meissner New
[38/45,V2] PR target/117251: Improve vector orc to vector nand fusion PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations - - - - --- 2025-06-11 Michael Meissner New
[37/45,V2] PR target/117251: Improve vector nand to vector nand fusion PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations - - - - --- 2025-06-11 Michael Meissner New
[36/45,V2] PR target/117251: Improve vector nand to vector or fusion PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations - - - - --- 2025-06-11 Michael Meissner New
[35/45,V2] PR target/117251: Improve vector nand to vector xor fusion PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations - - - - --- 2025-06-11 Michael Meissner New
[34/45,V2] PR target/117251: Improve vector and to vector nor fusion PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations - - - - --- 2025-06-11 Michael Meissner New
[33/45,V2] PR target/117251: Improve vector andc to vector eqv fusion PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations - - - - --- 2025-06-11 Michael Meissner New
[32/45,V2] PR target/117251: Improve vector andc to vector nor fusion PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations - - - - --- 2025-06-11 Michael Meissner New
[31/45,V2] PR target/117251: Improve vector orc to vector or fusion PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations - - - - --- 2025-06-11 Michael Meissner New
[30/45,V2] PR target/117251: Improve vector orc to vector xor fusion PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations - - - - --- 2025-06-11 Michael Meissner New
[29/45,V2] PR target/117251: Improve vector eqv to vector or fusion PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations - - - - --- 2025-06-11 Michael Meissner New
[28/45,V2] PR target/117251: Improve vector eqv to vector xor fusion PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations - - - - --- 2025-06-11 Michael Meissner New
[27/45,V2] PR target/117251: Improve vector xor to vector nor fusion PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations - - - - --- 2025-06-11 Michael Meissner New
[26/45,V2] PR target/117251: Improve vector nor to vector or fusion PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations - - - - --- 2025-06-11 Michael Meissner New
[25/45,V2] PR target/117251: Improve vector nor to vector xor fusion PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations - - - - --- 2025-06-11 Michael Meissner New
[24/45,V2] PR target/117251: Improve vector or to vector nor fusion PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations - - - - --- 2025-06-11 Michael Meissner New
[23/45,V2] PR target/117251: Improve vector or to vector or fusion PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations - - - - --- 2025-06-11 Michael Meissner New
[22/45,V2] PR target/117251: Improve vector or to vector xor fusion PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations - - - - --- 2025-06-11 Michael Meissner New
[21/45,V2] PR target/117251: Improve vector nor to vector nor fusion PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations - - - - --- 2025-06-11 Michael Meissner New
[20/45,V2] PR target/117251: Improve vector xor to vector or fusion PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations - - - - --- 2025-06-11 Michael Meissner New
[19/45,V2] PR target/117251: Improve vector xor to vector xor fusion PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations - - - - --- 2025-06-11 Michael Meissner New
[18/45,V2] PR target/117251: Improve vector eqv to vector nor fusion PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations - - - - --- 2025-06-11 Michael Meissner New
[17/45,V2] PR target/117251: Improve vector orc to vector orc fusion PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations - - - - --- 2025-06-11 Michael Meissner New
[16/45,V2] PR target/117251: Improve vector orc to vector eqv fusion PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations - - - - --- 2025-06-11 Michael Meissner New
[15/45,V2] PR target/117251: Improve vector orc to vector nor fusion PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations - - - - --- 2025-06-11 Michael Meissner New
[14/45,V2] PR target/117251: Improve vector andc to vector or fusion PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations - - - - --- 2025-06-11 Michael Meissner New
[13/45,V2] PR target/117251: Improve vector andc to vector xor fusion PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations - - - - --- 2025-06-11 Michael Meissner New
[12/45,V2] PR target/117251: Improve vector and to vector or fusion PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations - - - - --- 2025-06-11 Michael Meissner New
[11/45,V2] PR target/117251: Improve vector and to vector xor fusion PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations - - - - --- 2025-06-11 Michael Meissner New
[10/45,V2] PR target/117251: Improve vector nand to vector nor fusion PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations - - - - --- 2025-06-11 Michael Meissner New
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