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Michael Meissner
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Apply
«
1
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Patch
Series
A/F/R/T
S/W/F
Date
Submitter
Delegate
State
[6/6] Add support for 1,024 bit Dense Math Registers
PowerPC Future support (Dense Math Registers)
- - - -
-
-
-
2024-10-28
Michael Meissner
New
[5/6] Add dense math test for new instruction names
PowerPC Future support (Dense Math Registers)
- - - -
-
-
-
2024-10-28
Michael Meissner
New
[4/6] Switch to dense math names for all MMA operations with -mcpu=future
PowerPC Future support (Dense Math Registers)
- - - -
-
-
-
2024-10-28
Michael Meissner
New
[3/6] Add support for dense math registers.
PowerPC Future support (Dense Math Registers)
- - - -
-
-
-
2024-10-28
Michael Meissner
New
[2/6] Add wD constraint.
PowerPC Future support (Dense Math Registers)
- - - -
-
-
-
2024-10-28
Michael Meissner
New
[1/6] Use vector pair load/store for memcpy with -mcpu=future
PowerPC Future support (Dense Math Registers)
- - - -
-
-
-
2024-10-28
Michael Meissner
New
[11/11] Add -mcpu=future tuning support.
Separate PowerPC architecture bits from ISA flags that use command line options
- - - -
-
-
-
2024-10-25
Michael Meissner
New
[10/11] Add support for -mcpu=future
Separate PowerPC architecture bits from ISA flags that use command line options
- - - -
-
-
-
2024-10-25
Michael Meissner
New
[9/11] Update tests to work with architecture flags changes.
Separate PowerPC architecture bits from ISA flags that use command line options
- - - -
-
-
-
2024-10-25
Michael Meissner
New
[8/11] Change TARGET_MODULO to TARGET_POWER9
Separate PowerPC architecture bits from ISA flags that use command line options
- - - -
-
-
-
2024-10-25
Michael Meissner
New
[7/11] Change TARGET_POPCNTD to TARGET_POWER7
Separate PowerPC architecture bits from ISA flags that use command line options
- - - -
-
-
-
2024-10-25
Michael Meissner
New
[6/11] Change TARGET_CMPB to TARGET_POWER6
Separate PowerPC architecture bits from ISA flags that use command line options
- - - -
-
-
-
2024-10-25
Michael Meissner
New
[5/11] Change TARGET_FPRND to TARGET_POWER5X
Separate PowerPC architecture bits from ISA flags that use command line options
- - - -
-
-
-
2024-10-25
Michael Meissner
New
[4/11] Change TARGET_POPCNTB to TARGET_POWER5
Separate PowerPC architecture bits from ISA flags that use command line options
- - - -
-
-
-
2024-10-25
Michael Meissner
New
[3/11] Do not allow -mvsx to boost processor to power7.
Separate PowerPC architecture bits from ISA flags that use command line options
- - - -
-
-
-
2024-10-25
Michael Meissner
New
[2/11] Use architecture flags for defining _ARCH_PWR macros.
Separate PowerPC architecture bits from ISA flags that use command line options
- - - -
-
-
-
2024-10-25
Michael Meissner
New
[1/11] Add rs6000 architecture masks.s
Separate PowerPC architecture bits from ISA flags that use command line options
- - - -
-
-
-
2024-10-25
Michael Meissner
New
PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations
PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations
- - - -
-
-
-
2024-10-24
Michael Meissner
New
[1/1] PowerPC vector pair support
PowerPC vector pair support
- - - -
-
-
-
2024-10-07
Michael Meissner
New
PR 99293: Optimize splat of a V2DF/V2DI extract with constant element
PR 99293: Optimize splat of a V2DF/V2DI extract with constant element
- - - -
-
-
-
2024-09-17
Michael Meissner
New
[REPOST] PR 89213: Add better support for shifting vectors with 64-bit elements
[REPOST] PR 89213: Add better support for shifting vectors with 64-bit elements
- - - -
-
-
-
2024-09-17
Michael Meissner
New
PR target/89213 - Enhance V2DI/V2DF constant shifts
PR target/89213 - Enhance V2DI/V2DF constant shifts
- - - -
-
-
-
2024-08-14
Michael Meissner
New
[9/9] Update tests to work with architecture flags changes.
Adding PowerPC architecture flags in addition to ISA flags
- - - -
-
-
-
2024-08-02
Michael Meissner
New
[8/9] Change TARGET_MODULO to TARGET_POWER9
Adding PowerPC architecture flags in addition to ISA flags
- - - -
-
-
-
2024-08-02
Michael Meissner
New
[7/9] Change TARGET_POPCNTD to TARGET_POWER7
Adding PowerPC architecture flags in addition to ISA flags
- - - -
-
-
-
2024-08-02
Michael Meissner
New
[6/9] Change TARGET_CMPB to TARGET_POWER6
Adding PowerPC architecture flags in addition to ISA flags
- - - -
-
-
-
2024-08-02
Michael Meissner
New
[5/9] Change TARGET_FPRND to TARGET_POWER5X
Adding PowerPC architecture flags in addition to ISA flags
- - - -
-
-
-
2024-08-02
Michael Meissner
New
[4/9] Change TARGET_POPCNTB to TARGET_POWER5
Adding PowerPC architecture flags in addition to ISA flags
- - - -
-
-
-
2024-08-02
Michael Meissner
New
[3/9] Do not allow -mvsx to boost processor to power7.
Adding PowerPC architecture flags in addition to ISA flags
- - - -
-
-
-
2024-08-02
Michael Meissner
New
[2/9] Use architecture flags for defining _ARCH_PWR macros.s
Adding PowerPC architecture flags in addition to ISA flags
- - - -
-
-
-
2024-08-02
Michael Meissner
New
[1/9] Add rs6000 architecture masks.
Adding PowerPC architecture flags in addition to ISA flags
- - - -
-
-
-
2024-08-02
Michael Meissner
New
[2/2] PR target/113652, Adjust tests to skip float128 unless the compiler enables them by default
PR target/113652, Fix failed bootstrap on ppc unrecognized opcode: `lfiwzx' with -mcpu=7450
- - - -
-
-
-
2024-07-18
Michael Meissner
New
[1/2] PR target/113652, Fix failed bootstrap on ppc unrecognized opcode: `lfiwzx' with -mcpu=7450
PR target/113652, Fix failed bootstrap on ppc unrecognized opcode: `lfiwzx' with -mcpu=7450
- - - -
-
-
-
2024-07-18
Michael Meissner
New
[3/3] Add power11 tests
Add support for -mcpu=power11
- - - -
-
-
-
2024-07-10
Michael Meissner
New
[REPOST,2/3] Add tuning support for power11
Add support for -mcpu=power11
- - - -
-
-
-
2024-07-10
Michael Meissner
New
[REPOST,1/3] Add support for -mcpu=power11
Add support for -mcpu=power11
- - - -
-
-
-
2024-07-10
Michael Meissner
New
[2/2] PR 115800: Fix libstdc++-v3 on little endian powerpc using --with-cpu=power5
[1/2] PR 115800: Fix libgfortran build using --with-cpu=power5
- - - -
-
-
-
2024-07-10
Michael Meissner
New
[1/2] PR 115800: Fix libgfortran build using --with-cpu=power5
[1/2] PR 115800: Fix libgfortran build using --with-cpu=power5
- - - -
-
-
-
2024-07-10
Michael Meissner
New
[3/3] Add power11 tests
Add support for -mcpu=power11
- - - -
-
-
-
2024-06-04
Michael Meissner
New
[2/3] Add tuning support for power11
Add support for -mcpu=power11
- - - -
-
-
-
2024-06-04
Michael Meissner
New
[1/3] Add support for -mcpu=power11
Add support for -mcpu=power11
- - - -
-
-
-
2024-06-04
Michael Meissner
New
[3/3] Add -mcpu=power11 tests
Add support for -mcpu=power11
- - - -
-
-
-
2024-03-20
Michael Meissner
New
[2/3] Add tuning support for -mcpu=power11
Add support for -mcpu=power11
- - - -
-
-
-
2024-03-20
Michael Meissner
New
[1/3] Add basic support for -mcpu=power11
Add support for -mcpu=power11
- - - -
-
-
-
2024-03-20
Michael Meissner
New
Patch [7 of 7]: Enable using vector pair load/store for -mcpu=future
Patch [7 of 7]: Enable using vector pair load/store for -mcpu=future
- - - -
-
-
-
2024-02-14
Michael Meissner
New
Patch [6 of 7]: Set future machine type in assembler if -mcpu=future
Patch [6 of 7]: Set future machine type in assembler if -mcpu=future
- - - -
-
-
-
2024-02-14
Michael Meissner
New
Patch [5 of 7]: Make -mtune=future be the same as -mtune=power10.
Patch [5 of 7]: Make -mtune=future be the same as -mtune=power10.
- - - -
-
-
-
2024-02-14
Michael Meissner
New
Patch [4 of 7]: Pass -mfuture to assembler if -mcpu=future.
Patch [4 of 7]: Pass -mfuture to assembler if -mcpu=future.
- - - -
-
-
-
2024-02-14
Michael Meissner
New
Patch [3 of 7]: Define _ARCH_PWR_FUTURE if -mcpu=future.
Patch [3 of 7]: Define _ARCH_PWR_FUTURE if -mcpu=future.
- - - -
-
-
-
2024-02-14
Michael Meissner
New
Patch [2 of 7]: Add debugging for -mcpu=future
Patch [2 of 7]: Add debugging for -mcpu=future
- - - -
-
-
-
2024-02-14
Michael Meissner
New
Patch [1 of 7]: Add initial -mcpu=future support.
Patch [1 of 7]: Add initial -mcpu=future support.
- - - -
-
-
-
2024-02-14
Michael Meissner
New
[V2] PR target/112886, Add %S<n> to print_operand for vector pair support.
[V2] PR target/112886, Add %S<n> to print_operand for vector pair support.
- - - -
-
-
-
2024-01-11
Michael Meissner
New
Repost [PATCH 6/6] PowerPC: Add support for 1,024 bit DMR registers.
Repost [PATCH 6/6] PowerPC: Add support for 1,024 bit DMR registers.
- - - -
-
-
-
2024-01-05
Michael Meissner
New
Repost [PATCH 5/6] PowerPC: Switch to dense math names for all MMA operations.
Repost [PATCH 5/6] PowerPC: Switch to dense math names for all MMA operations.
- - - -
-
-
-
2024-01-05
Michael Meissner
New
Repost [PATCH 4/6] PowerPC: Make MMA insns support DMR registers.
Repost [PATCH 4/6] PowerPC: Make MMA insns support DMR registers.
- - - -
-
-
-
2024-01-05
Michael Meissner
New
Repost [PATCH 3/6] PowerPC: Add support for accumulators in DMR registers.
Repost [PATCH 3/6] PowerPC: Add support for accumulators in DMR registers.
- - - -
-
-
-
2024-01-05
Michael Meissner
New
Repost [PATCH 2/6] PowerPC: Make -mcpu=future enable -mblock-ops-vector-pair.
Repost [PATCH 2/6] PowerPC: Make -mcpu=future enable -mblock-ops-vector-pair.
- - - -
-
-
-
2024-01-05
Michael Meissner
New
Repost [PATCH 1/6] Add -mcpu=future
Repost [PATCH 1/6] Add -mcpu=future
- - - -
-
-
-
2024-01-05
Michael Meissner
New
PR target/112886, Add %S<n> to print_operand for vector pair support
PR target/112886, Add %S<n> to print_operand for vector pair support
- - - -
-
-
-
2024-01-05
Michael Meissner
New
[4/4] Add vector pair tests to PowerPC
Add vector pair support to PowerPC attribute((vector_size(32)))
- - - -
-
-
-
2023-11-20
Michael Meissner
New
[3/4] Add integer vector pair mode support to PowerPC
Add vector pair support to PowerPC attribute((vector_size(32)))
- - - -
-
-
-
2023-11-20
Michael Meissner
New
[2/4] Vector pair floating point support for PowerPC
Add vector pair support to PowerPC attribute((vector_size(32)))
- - - -
-
-
-
2023-11-20
Michael Meissner
New
[1/4] Add vector pair modes to PowerPC (patch attached)
Add vector pair support to PowerPC attribute((vector_size(32)))
- - - -
-
-
-
2023-11-20
Michael Meissner
New
[4/4] Add support for doing a horizontal add on vector pair elements.
Add vector pair builtins to PowerPC
- - - -
-
-
-
2023-11-10
Michael Meissner
New
[3/4] Add support for initializing and extracting from vector pairs
Add vector pair builtins to PowerPC
- - - -
-
-
-
2023-11-10
Michael Meissner
New
[2/4] Add support for integer vector pair built-ins
Add vector pair builtins to PowerPC
- - - -
-
-
-
2023-11-10
Michael Meissner
New
[1/4] Add support for floating point vector pair built-in functions
Add vector pair builtins to PowerPC
- - - -
-
-
-
2023-11-10
Michael Meissner
New
[V2] Power10: Add options to disable load and store vector pair.
[V2] Power10: Add options to disable load and store vector pair.
- - - -
-
-
-
2023-11-10
Michael Meissner
New
[6/6] PowerPC: Add support for 1,024 bit DMR registers.
PowerPC Future patches
- - - -
-
-
-
2023-10-19
Michael Meissner
New
[5/6] PowerPC: Switch to dense math names for all MMA operations.
PowerPC Future patches
- - - -
-
-
-
2023-10-19
Michael Meissner
New
[4/6] PowerPC: Make MMA insns support DMR registers.
PowerPC Future patches
- - - -
-
-
-
2023-10-19
Michael Meissner
New
[3/6] PowerPC: Add support for accumulators in DMR registers.
PowerPC Future patches
- - - -
-
-
-
2023-10-19
Michael Meissner
New
[2/6] PowerPC: Make -mcpu=future enable -mblock-ops-vector-pair.
PowerPC Future patches
- - - -
-
-
-
2023-10-19
Michael Meissner
New
Power10: Add options to disable load and store vector pair.
Power10: Add options to disable load and store vector pair.
- - - -
-
-
-
2023-10-13
Michael Meissner
New
PR target/111778 - Fix undefined shifts in PowerPC compiler
PR target/111778 - Fix undefined shifts in PowerPC compiler
- - - -
-
-
-
2023-10-12
Michael Meissner
New
Cleanup: Replace UNSPEC_COPYSIGN with copysign RTL
Cleanup: Replace UNSPEC_COPYSIGN with copysign RTL
- - - -
-
-
-
2023-09-29
Michael Meissner
New
Fix typo in insn name.
Fix typo in insn name.
- - - -
-
-
-
2023-07-10
Michael Meissner
New
Improve 64->128 bit zero extension on PowerPC (PR target/108958)
Improve 64->128 bit zero extension on PowerPC (PR target/108958)
- - - -
-
-
-
2023-07-10
Michael Meissner
New
Optimize vec_splats of vec_extract for V2DI/V2DF (PR target/99293)
Optimize vec_splats of vec_extract for V2DI/V2DF (PR target/99293)
- - - -
-
-
-
2023-07-10
Michael Meissner
New
[V6] Fix power10 fusion and -fstack-protector, PR target/105325
[V6] Fix power10 fusion and -fstack-protector, PR target/105325
- - - -
-
-
-
2023-06-14
Michael Meissner
New
[V5,2/2] PR target/105325: Fix memory constraints for power10 fusion.
PR target/105325: Fix constraint issue with power10 fusion
- - - -
-
-
-
2023-05-10
Michael Meissner
New
[V4] PR target/105325, Make load/cmp fusion know about prefixed loads.
[V4] PR target/105325, Make load/cmp fusion know about prefixed loads.
- - - -
-
-
-
2023-04-26
Michael Meissner
New
[V3] PR target/70243 - Do not generate vmaddfp or vnmsubdp
[V3] PR target/70243 - Do not generate vmaddfp or vnmsubdp
- - - -
-
-
-
2023-04-08
Michael Meissner
New
[V2] PR target/70243: Do not generate vmaddfp and vnmsubfp
[V2] PR target/70243: Do not generate vmaddfp and vnmsubfp
- - - -
-
-
-
2023-04-07
Michael Meissner
New
PR target/70243: Do not generate fmaddfp and fnmsubfp
PR target/70243: Do not generate fmaddfp and fnmsubfp
- - - -
-
-
-
2023-04-06
Michael Meissner
New
[V3] PR target/105325, Make load/cmp fusion know about prefixed loads
[V3] PR target/105325, Make load/cmp fusion know about prefixed loads
- - - -
-
-
-
2023-03-28
Michael Meissner
New
[V2] PR target/105325, Make load/cmp fusion know about prefixed load
[V2] PR target/105325, Make load/cmp fusion know about prefixed load
- - - -
-
-
-
2023-03-24
Michael Meissner
New
PR target/105325, Make load/cmp fusion know about prefixed loads
PR target/105325, Make load/cmp fusion know about prefixed loads
- - - -
-
-
-
2023-03-21
Michael Meissner
New
[V4] Rework 128-bit complex multiply and divide.
[V4] Rework 128-bit complex multiply and divide.
- - - -
-
-
-
2023-03-10
Michael Meissner
New
[8/8] Add saturating subtract built-ins.
PowerPC future support for Dense Math
- - - -
-
-
-
2023-02-03
Michael Meissner
New
[7/8] Support load/store vector with right length.
PowerPC future support for Dense Math
- - - -
-
-
-
2023-02-03
Michael Meissner
New
[6/8] PowerPC: Add support for 1,024 bit DMR registers.
PowerPC future support for Dense Math
- - - -
-
-
-
2023-02-03
Michael Meissner
New
[4/8] PowerPC: Switch to dense math names for all MMA operations
PowerPC future support for Dense Math
- - - -
-
-
-
2023-02-03
Michael Meissner
New
[3/8] PowerPC: Make MMA insns support DMR registers.
PowerPC future support for Dense Math
- - - -
-
-
-
2023-02-03
Michael Meissner
New
[2/8] PowerPC: Add support for accumulators in DMR registers.
PowerPC future support for Dense Math
- - - -
-
-
-
2023-02-03
Michael Meissner
New
[1/8] PowerPC: Make -mcpu=future enable -mblock-ops-vector-pair
[1/8] PowerPC: Make -mcpu=future enable -mblock-ops-vector-pair
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2023-02-03
Michael Meissner
New
[1/8] PowerPC: Add -mcpu=future.
PowerPC future support for Dense Math
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2023-02-03
Michael Meissner
New
[2/2] Rework 128-bit complex multiply and divide.
Repost of patches for solving the build on Fedora 36 problem
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2023-02-03
Michael Meissner
New
[1/2] PR target/107299: Fix build issue when long double is IEEE 128-bit
Repost of patches for solving the build on Fedora 36 problem
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2023-02-03
Michael Meissner
New
Bump up precision size to 16 bits.
Bump up precision size to 16 bits.
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2023-02-02
Michael Meissner
New
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