mbox series

[0/5] aarch64: Add ACLE intrinsics codegen support for lrcpc3 instructions

Message ID 20231109141300.3542453-1-victor.donascimento@arm.com
Headers show
Series aarch64: Add ACLE intrinsics codegen support for lrcpc3 instructions | expand

Message

Victor Do Nascimento Nov. 9, 2023, 2:12 p.m. UTC 
Given the introduction of the third set of Release Consistency
processor consistent (RCpc) memory model-compliant instructions in
the form of FEAT_LRCPC3 as an optional extension from Armv8.2-a
onward, this patch series adds the RCPC3 ACLE Neon intrinsics,
thus enabling the use of the architectural feature in C.

These intrinsics enable the use of the new LDAP1 and STL1
instructions and are given single and twin-lane variants for unsigned,
signed and poly 64-bit values, in the form of the following
builtin-functions:

  * vldap1_lane_{u|s|p}64
  * vldap1q_lane_{u|s|p}64
  * ldp1_lane_{u|s|p}64
  * ldp1q_lane_{u|s|p}64

Bootstrapped and regression tested on aarch64-none-linux-gnu.

Victor Do Nascimento (5):
  aarch64: rcpc3: Add +rcpc3 extension
  aarch64: rcpc3: Add relevant iterators to handle Neon intrinsics
  aarch64: rcpc3: Add Neon ACLE intrinsics
  aarch64: rcpc3: add Neon ACLE wrapper functions to `arm_neon.h'
  aarch64: rcpc3: Add intrinsics tests

 .../aarch64/aarch64-option-extensions.def     |   1 +
 gcc/config/aarch64/aarch64-simd-builtins.def  |   7 +
 gcc/config/aarch64/aarch64-simd.md            |  65 +++++++++
 gcc/config/aarch64/aarch64.h                  |   4 +
 gcc/config/aarch64/aarch64.md                 |   2 +
 gcc/config/aarch64/arm_neon.h                 | 129 ++++++++++++++++++
 gcc/config/aarch64/iterators.md               |  25 ++--
 gcc/doc/invoke.texi                           |   4 +
 gcc/testsuite/gcc.target/aarch64/acle/rcpc3.c |  47 +++++++
 9 files changed, 276 insertions(+), 8 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/aarch64/acle/rcpc3.c