| Message ID | 20240501-usb-phy-gs101-v2-1-ed9f14a1bd6d@linaro.org |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | USB31DRD phy support for Google Tensor gs101 (HS & SS) | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | success | |
| robh/patch-applied | success | |
| robh/dtbs-check | warning | build log |
| robh/dt-meta-schema | success |
On 01/05/2024 11:19, André Draszik wrote: > Add a dedicated google,gs101-usb31drd-phy compatible for Google Tensor > gs101 SoC. > > It needs additional clocks enabled for register access, and additional > memory regions (PCS & PMA) are required for successful configuration. > > Signed-off-by: André Draszik <andre.draszik@linaro.org> > > --- > v2: avoid having nested else/if, and instead change the existing 'else' > to explicitly state the platforms using 'if' > --- > .../bindings/phy/samsung,usb3-drd-phy.yaml | 61 +++++++++++++++++++++- > 1 file changed, 59 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml > index 452e584d9812..f99f055ec704 100644 > --- a/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml > +++ b/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml > @@ -25,6 +25,7 @@ description: | > properties: > compatible: > enum: > + - google,gs101-usb31drd-phy > - samsung,exynos5250-usbdrd-phy > - samsung,exynos5420-usbdrd-phy > - samsung,exynos5433-usbdrd-phy > @@ -57,7 +58,18 @@ properties: > the OF graph bindings specified. > > reg: > - maxItems: 1 > + minItems: 1 > + items: > + - description: PHY register base address. > + - description: PCS register base address. > + - description: PMA register base address. Drop redundant parts ("register base address.")... which leaves absolutely no information comparing to reg-names. Please provide description. > + > + reg-names: > + minItems: 1 > + items: > + - const: phy > + - const: pcs > + - const: pma > > samsung,pmu-syscon: > $ref: /schemas/types.yaml#/definitions/phandle > @@ -81,6 +93,34 @@ required: > - samsung,pmu-syscon Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml index 452e584d9812..f99f055ec704 100644 --- a/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml +++ b/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml @@ -25,6 +25,7 @@ description: | properties: compatible: enum: + - google,gs101-usb31drd-phy - samsung,exynos5250-usbdrd-phy - samsung,exynos5420-usbdrd-phy - samsung,exynos5433-usbdrd-phy @@ -57,7 +58,18 @@ properties: the OF graph bindings specified. reg: - maxItems: 1 + minItems: 1 + items: + - description: PHY register base address. + - description: PCS register base address. + - description: PMA register base address. + + reg-names: + minItems: 1 + items: + - const: phy + - const: pcs + - const: pma samsung,pmu-syscon: $ref: /schemas/types.yaml#/definitions/phandle @@ -81,6 +93,34 @@ required: - samsung,pmu-syscon allOf: + - if: + properties: + compatible: + contains: + const: google,gs101-usb31drd-phy + then: + properties: + clocks: + items: + - description: Gate of main PHY clock + - description: Gate of PHY reference clock + - description: Gate of control interface AXI clock + - description: Gate of control interface APB clock + - description: Gate of SCL APB clock + clock-names: + items: + - const: phy + - const: ref + - const: ctrl_aclk + - const: ctrl_pclk + - const: scl_pclk + reg: + minItems: 3 + reg-names: + minItems: 3 + required: + - reg-names + - if: properties: compatible: @@ -100,7 +140,20 @@ allOf: - const: phy_utmi - const: phy_pipe - const: itp - else: + reg: + maxItems: 1 + reg-names: + maxItems: 1 + + - if: + properties: + compatible: + contains: + enum: + - samsung,exynos5250-usbdrd-phy + - samsung,exynos5420-usbdrd-phy + - samsung,exynos850-usbdrd-phy + then: properties: clocks: minItems: 2 @@ -109,6 +162,10 @@ allOf: items: - const: phy - const: ref + reg: + maxItems: 1 + reg-names: + maxItems: 1 additionalProperties: false
Add a dedicated google,gs101-usb31drd-phy compatible for Google Tensor gs101 SoC. It needs additional clocks enabled for register access, and additional memory regions (PCS & PMA) are required for successful configuration. Signed-off-by: André Draszik <andre.draszik@linaro.org> --- v2: avoid having nested else/if, and instead change the existing 'else' to explicitly state the platforms using 'if' --- .../bindings/phy/samsung,usb3-drd-phy.yaml | 61 +++++++++++++++++++++- 1 file changed, 59 insertions(+), 2 deletions(-)