| Message ID | 20220303085934.29792-1-biju.das.jz@bp.renesas.com |
|---|---|
| State | Changes Requested, archived |
| Headers | show |
| Series | [1/2] dt-bindings: serial: renesas,scif: Update compatible string for RZ/G2UL SoC | expand |
| Context | Check | Description |
|---|---|---|
| robh/patch-applied | fail |
Hi Biju, On Thu, Mar 3, 2022 at 9:59 AM Biju Das <biju.das.jz@bp.renesas.com> wrote: > Both RZ/G2UL and RZ/Five SoC's have SoC ID starting with R9A07G043. > To distinguish between them update the compatible string to > "renesas,scif-r9a07g043u" for RZ/G2UL SoC. > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Thanks for your patch! > --- a/Documentation/devicetree/bindings/serial/renesas,scif.yaml > +++ b/Documentation/devicetree/bindings/serial/renesas,scif.yaml > @@ -76,7 +76,7 @@ properties: > > - items: > - enum: > - - renesas,scif-r9a07g043 # RZ/G2UL > + - renesas,scif-r9a07g043u # RZ/G2UL Is this really needed? As far as we know, RZ/Five and RZ/G2UL do use the same I/O blocks? > - renesas,scif-r9a07g054 # RZ/V2L > - const: renesas,scif-r9a07g044 # RZ/G2{L,LC} fallback Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
Hi Geert, Thanks for the feedback > Subject: Re: [PATCH 1/2] dt-bindings: serial: renesas,scif: Update > compatible string for RZ/G2UL SoC > > Hi Biju, > > On Thu, Mar 3, 2022 at 9:59 AM Biju Das <biju.das.jz@bp.renesas.com> > wrote: > > Both RZ/G2UL and RZ/Five SoC's have SoC ID starting with R9A07G043. > > To distinguish between them update the compatible string to > > "renesas,scif-r9a07g043u" for RZ/G2UL SoC. > > > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > Thanks for your patch! > > > --- a/Documentation/devicetree/bindings/serial/renesas,scif.yaml > > +++ b/Documentation/devicetree/bindings/serial/renesas,scif.yaml > > @@ -76,7 +76,7 @@ properties: > > > > - items: > > - enum: > > - - renesas,scif-r9a07g043 # RZ/G2UL > > + - renesas,scif-r9a07g043u # RZ/G2UL > > Is this really needed? As far as we know, RZ/Five and RZ/G2UL do use the > same I/O blocks? OK, Just thought their DEVID is different and they use RISC-V instead of ARM64. I agree it uses identical IP blocks. May be I can drop this patch, if it is not really needed. Please let me know. Cheers, Biju > > > - renesas,scif-r9a07g054 # RZ/V2L > > - const: renesas,scif-r9a07g044 # RZ/G2{L,LC} fallback > > Gr{oetje,eeting}s, > > Geert > > -- > Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux- > m68k.org > > In personal conversations with technical people, I call myself a hacker. > But when I'm talking to journalists I just say "programmer" or something > like that. > -- Linus Torvalds
Hi Biju, On Thu, Mar 3, 2022 at 10:55 AM Biju Das <biju.das.jz@bp.renesas.com> wrote: > > Subject: Re: [PATCH 1/2] dt-bindings: serial: renesas,scif: Update > > compatible string for RZ/G2UL SoC > > On Thu, Mar 3, 2022 at 9:59 AM Biju Das <biju.das.jz@bp.renesas.com> > > wrote: > > > Both RZ/G2UL and RZ/Five SoC's have SoC ID starting with R9A07G043. > > > To distinguish between them update the compatible string to > > > "renesas,scif-r9a07g043u" for RZ/G2UL SoC. > > > > > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > > > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > > > Thanks for your patch! > > > > > --- a/Documentation/devicetree/bindings/serial/renesas,scif.yaml > > > +++ b/Documentation/devicetree/bindings/serial/renesas,scif.yaml > > > @@ -76,7 +76,7 @@ properties: > > > > > > - items: > > > - enum: > > > - - renesas,scif-r9a07g043 # RZ/G2UL > > > + - renesas,scif-r9a07g043u # RZ/G2UL > > > > Is this really needed? As far as we know, RZ/Five and RZ/G2UL do use the > > same I/O blocks? > > OK, Just thought their DEVID is different and they use RISC-V instead of ARM64. > I agree it uses identical IP blocks. > > May be I can drop this patch, if it is not really needed. Please let me know. Please see my response in https://lore.kernel.org/r/CAMuHMdUZw5bxUgEif=pT-2Gm1ha-Z01r+AJ6ieC62SwkfMYD5Q@mail.gmail.com/ Let's continue the discussion there... Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
diff --git a/Documentation/devicetree/bindings/serial/renesas,scif.yaml b/Documentation/devicetree/bindings/serial/renesas,scif.yaml index 5d37f8f189fb..9485cb5de2c8 100644 --- a/Documentation/devicetree/bindings/serial/renesas,scif.yaml +++ b/Documentation/devicetree/bindings/serial/renesas,scif.yaml @@ -76,7 +76,7 @@ properties: - items: - enum: - - renesas,scif-r9a07g043 # RZ/G2UL + - renesas,scif-r9a07g043u # RZ/G2UL - renesas,scif-r9a07g054 # RZ/V2L - const: renesas,scif-r9a07g044 # RZ/G2{L,LC} fallback