Message ID | 20220303085934.29792-2-biju.das.jz@bp.renesas.com |
---|---|
State | Changes Requested, archived |
Headers | show |
Series | [1/2] dt-bindings: serial: renesas,scif: Update compatible string for RZ/G2UL SoC | expand |
Context | Check | Description |
---|---|---|
robh/patch-applied | fail |
Hi Biju, On Thu, Mar 3, 2022 at 9:59 AM Biju Das <biju.das.jz@bp.renesas.com> wrote: > Both RZ/G2UL and RZ/Five SoC's have SoC ID starting with R9A07G043. > To distinguish between them update the compatible string to > "renesas,r9a07g043u-sci" for RZ/G2UL SoC. > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Thanks for your patch! > --- a/Documentation/devicetree/bindings/serial/renesas,sci.yaml > +++ b/Documentation/devicetree/bindings/serial/renesas,sci.yaml > @@ -17,7 +17,7 @@ properties: > oneOf: > - items: > - enum: > - - renesas,r9a07g043-sci # RZ/G2UL > + - renesas,r9a07g043u-sci # RZ/G2UL Is this really needed? As far as we know, RZ/Five and RZ/G2UL do use the same I/O blocks? > - renesas,r9a07g044-sci # RZ/G2{L,LC} > - renesas,r9a07g054-sci # RZ/V2L > - const: renesas,sci # generic SCI compatible UART Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
Hi Geert, Thanks for the feedback. > Subject: Re: [PATCH 2/2] dt-bindings: serial: renesas,sci: Update > compatible string for RZ/G2UL SoC > > Hi Biju, > > On Thu, Mar 3, 2022 at 9:59 AM Biju Das <biju.das.jz@bp.renesas.com> > wrote: > > Both RZ/G2UL and RZ/Five SoC's have SoC ID starting with R9A07G043. > > To distinguish between them update the compatible string to > > "renesas,r9a07g043u-sci" for RZ/G2UL SoC. > > > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > Thanks for your patch! > > > --- a/Documentation/devicetree/bindings/serial/renesas,sci.yaml > > +++ b/Documentation/devicetree/bindings/serial/renesas,sci.yaml > > @@ -17,7 +17,7 @@ properties: > > oneOf: > > - items: > > - enum: > > - - renesas,r9a07g043-sci # RZ/G2UL > > + - renesas,r9a07g043u-sci # RZ/G2UL > > Is this really needed? As far as we know, RZ/Five and RZ/G2UL do use the > same I/O blocks? OK, Just thought their DEVID is different and they use RISC-V instead of ARM64. I agree it uses identical IP blocks. May be I can drop this patch, if it is not really needed. Please let me know. Cheers, Biju > > > - renesas,r9a07g044-sci # RZ/G2{L,LC} > > - renesas,r9a07g054-sci # RZ/V2L > > - const: renesas,sci # generic SCI compatible UART > > Gr{oetje,eeting}s, > > Geert > > -- > Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux- > m68k.org > > In personal conversations with technical people, I call myself a hacker. > But when I'm talking to journalists I just say "programmer" or something > like that. > -- Linus Torvalds
Hi Biju, On Thu, Mar 3, 2022 at 10:53 AM Biju Das <biju.das.jz@bp.renesas.com> wrote: > > Subject: Re: [PATCH 2/2] dt-bindings: serial: renesas,sci: Update > > compatible string for RZ/G2UL SoC > > On Thu, Mar 3, 2022 at 9:59 AM Biju Das <biju.das.jz@bp.renesas.com> > > wrote: > > > Both RZ/G2UL and RZ/Five SoC's have SoC ID starting with R9A07G043. > > > To distinguish between them update the compatible string to > > > "renesas,r9a07g043u-sci" for RZ/G2UL SoC. > > > > > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > > > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > > > Thanks for your patch! > > > > > --- a/Documentation/devicetree/bindings/serial/renesas,sci.yaml > > > +++ b/Documentation/devicetree/bindings/serial/renesas,sci.yaml > > > @@ -17,7 +17,7 @@ properties: > > > oneOf: > > > - items: > > > - enum: > > > - - renesas,r9a07g043-sci # RZ/G2UL > > > + - renesas,r9a07g043u-sci # RZ/G2UL > > > > Is this really needed? As far as we know, RZ/Five and RZ/G2UL do use the > > same I/O blocks? > > OK, Just thought their DEVID is different and they use RISC-V instead of ARM64. > I agree it uses identical IP blocks. > > May be I can drop this patch, if it is not really needed. Please let me know. I think it is not needed. We used the same compatible values ("r8a7778") for R-Car M1A (R8A77781, SH-4A + CA9) and M1S (R8A77780, SH-4A only), too, (probably not by design, as we never supported the latter under arch/sh/ ;-) We do need a different top-level compatible value for the RZ/Five SoC, like we already have for the RZ/G2UL variants: - description: RZ/G2UL (R9A07G043) items: - enum: - renesas,r9a07g043u11 # RZ/G2UL Type-1 - renesas,r9a07g043u12 # RZ/G2UL Type-2 - const: renesas,r9a07g043 So if we ever have an issue due to a difference, we can handle that through soc_device_match(), just like for RZ/V2L vs. RZ/G2L. BTW, I guess RZ/G2UL Type-1 and Type-2 do have the same DEVID, and only differ in PRR? Any other opinions? Thanks! Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
Hi Geert, > Subject: Re: [PATCH 2/2] dt-bindings: serial: renesas,sci: Update > compatible string for RZ/G2UL SoC > > Hi Biju, > > On Thu, Mar 3, 2022 at 10:53 AM Biju Das <biju.das.jz@bp.renesas.com> > wrote: > > > Subject: Re: [PATCH 2/2] dt-bindings: serial: renesas,sci: Update > > > compatible string for RZ/G2UL SoC On Thu, Mar 3, 2022 at 9:59 AM > > > Biju Das <biju.das.jz@bp.renesas.com> > > > wrote: > > > > Both RZ/G2UL and RZ/Five SoC's have SoC ID starting with R9A07G043. > > > > To distinguish between them update the compatible string to > > > > "renesas,r9a07g043u-sci" for RZ/G2UL SoC. > > > > > > > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > > > > Reviewed-by: Lad Prabhakar > > > > <prabhakar.mahadev-lad.rj@bp.renesas.com> > > > > > > Thanks for your patch! > > > > > > > --- a/Documentation/devicetree/bindings/serial/renesas,sci.yaml > > > > +++ b/Documentation/devicetree/bindings/serial/renesas,sci.yaml > > > > @@ -17,7 +17,7 @@ properties: > > > > oneOf: > > > > - items: > > > > - enum: > > > > - - renesas,r9a07g043-sci # RZ/G2UL > > > > + - renesas,r9a07g043u-sci # RZ/G2UL > > > > > > Is this really needed? As far as we know, RZ/Five and RZ/G2UL do use > > > the same I/O blocks? > > > > OK, Just thought their DEVID is different and they use RISC-V instead of > ARM64. > > I agree it uses identical IP blocks. > > > > May be I can drop this patch, if it is not really needed. Please let me > know. > > I think it is not needed. We used the same compatible values > ("r8a7778") for R-Car M1A (R8A77781, SH-4A + CA9) and M1S (R8A77780, SH-4A > only), too, (probably not by design, as we never supported the latter > under arch/sh/ ;-) > > We do need a different top-level compatible value for the RZ/Five SoC, > like we already have for the RZ/G2UL variants: > > - description: RZ/G2UL (R9A07G043) > items: > - enum: > - renesas,r9a07g043u11 # RZ/G2UL Type-1 > - renesas,r9a07g043u12 # RZ/G2UL Type-2 > - const: renesas,r9a07g043 > > So if we ever have an issue due to a difference, we can handle that > through soc_device_match(), just like for RZ/V2L vs. RZ/G2L. Agreed. > > BTW, I guess RZ/G2UL Type-1 and Type-2 do have the same DEVID, and only > differ in PRR? Yes, They have same DEVID and PRR, but there is a way to distinguish between Type-1 and Type-2. I am checking this with hardware people. Cheers, Biju
diff --git a/Documentation/devicetree/bindings/serial/renesas,sci.yaml b/Documentation/devicetree/bindings/serial/renesas,sci.yaml index bf7708a7a2c0..49a8285ad604 100644 --- a/Documentation/devicetree/bindings/serial/renesas,sci.yaml +++ b/Documentation/devicetree/bindings/serial/renesas,sci.yaml @@ -17,7 +17,7 @@ properties: oneOf: - items: - enum: - - renesas,r9a07g043-sci # RZ/G2UL + - renesas,r9a07g043u-sci # RZ/G2UL - renesas,r9a07g044-sci # RZ/G2{L,LC} - renesas,r9a07g054-sci # RZ/V2L - const: renesas,sci # generic SCI compatible UART