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[0/4] support watchdog for exynosautov9

Message ID 20220520121750.71473-1-chanho61.park@samsung.com
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Series support watchdog for exynosautov9 | expand

Message

Chanho Park May 20, 2022, 12:17 p.m. UTC
This adds to support watchdog and its device tree nodes for Exynos Auto
v9 SoC. Like exynos850, the SoC has two cpu watchdog devices but they
have different CPU configurations compared with exynos850. So, we need
to add separate configurations for Exynos Auto v9 SoC.

Chanho Park (4):
  dt-bindings: watchdog: add exynosautov9 compatible
  watchdog: s3c2410_wdt: support exynosautov9 watchdog
  arm64: dts: exynosautov9: add watchdog DT nodes
  arm64: dts: exynosautov9-sadk: enable watchdog devices

 .../bindings/watchdog/samsung-wdt.yaml        |  3 ++
 .../boot/dts/exynos/exynosautov9-sadk.dts     |  8 ++++
 arch/arm64/boot/dts/exynos/exynosautov9.dtsi  | 22 ++++++++++
 drivers/watchdog/s3c2410_wdt.c                | 41 +++++++++++++++++--
 4 files changed, 70 insertions(+), 4 deletions(-)

Comments

Krzysztof Kozlowski May 20, 2022, 12:58 p.m. UTC | #1
On 20/05/2022 14:17, Chanho Park wrote:
> Adds two cpu watchdog devices for ExynosAutov9 SoC.
> 
> Signed-off-by: Chanho Park <chanho61.park@samsung.com>
> ---
>  arch/arm64/boot/dts/exynos/exynosautov9.dtsi | 22 ++++++++++++++++++++
>  1 file changed, 22 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi
> index 3e23db8f09d9..34be955dc2d5 100644
> --- a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi
> +++ b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi
> @@ -400,6 +400,28 @@ ufs_0: ufs0@17e00000 {
>  			samsung,sysreg = <&syscon_fsys2 0x710>;
>  			status = "disabled";
>  		};
> +
> +		watchdog_cl0: watchdog@10050000 {
> +			compatible = "samsung,exynosautov9-wdt";
> +			reg = <0x10050000 0x100>;
> +			interrupts = <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&cmu_peris CLK_GOUT_WDT_CLUSTER0>, <&xtcxo>;
> +			clock-names = "watchdog", "watchdog_src";
> +			samsung,syscon-phandle = <&pmu_system_controller>;
> +			samsung,cluster-index = <0>;
> +			status = "disabled";

Blocks which do not need board-level resources should be enabled by
default, so drop status and drop patch #4.

Best regards,
Krzysztof
Krzysztof Kozlowski May 20, 2022, 1:01 p.m. UTC | #2
On 20/05/2022 14:17, Chanho Park wrote:

> @@ -644,9 +675,11 @@ s3c2410_get_wdt_drv_data(struct platform_device *pdev)
>  
>  		switch (index) {
>  		case 0:
> -			return &drv_data_exynos850_cl0;
> +			return variant;
>  		case 1:
> -			return &drv_data_exynos850_cl1;
> +			return (variant == &drv_data_exynos850_cl0) ?
> +				&drv_data_exynos850_cl1 :
> +				&drv_data_exynosautov9_cl1;

This stops scaling... it's fine now, but any next variant will require
some rework.


Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>


Best regards,
Krzysztof
Chanho Park May 23, 2022, 11:30 a.m. UTC | #3
> > diff --git a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi
> > b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi
> > index 3e23db8f09d9..34be955dc2d5 100644
> > --- a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi
> > +++ b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi
> > @@ -400,6 +400,28 @@ ufs_0: ufs0@17e00000 {
> >  			samsung,sysreg = <&syscon_fsys2 0x710>;
> >  			status = "disabled";
> >  		};
> > +
> > +		watchdog_cl0: watchdog@10050000 {
> > +			compatible = "samsung,exynosautov9-wdt";
> > +			reg = <0x10050000 0x100>;
> > +			interrupts = <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>;
> > +			clocks = <&cmu_peris CLK_GOUT_WDT_CLUSTER0>, <&xtcxo>;
> > +			clock-names = "watchdog", "watchdog_src";
> > +			samsung,syscon-phandle = <&pmu_system_controller>;
> > +			samsung,cluster-index = <0>;
> > +			status = "disabled";
> 
> Blocks which do not need board-level resources should be enabled by
> default, so drop status and drop patch #4.

Okay. They can be enabled as default. I'll drop the status and #4 patch as well.

Best Regards,
Chanho Park
Guenter Roeck Sept. 25, 2022, 5:05 p.m. UTC | #4
On Fri, May 20, 2022 at 09:17:48PM +0900, Chanho Park wrote:
> Like exynos850, exynosautov9 SoC also has two cpu watchdogs.
> Unfortunately, some configurations are slightly different so we need to
> add samsung,exynosautov9-wdt and separate drv data for those watchdogs.
> 
> Signed-off-by: Chanho Park <chanho61.park@samsung.com>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Reviewed-by: Guenter Roeck <linux@roeck-us.net>

> ---
>  drivers/watchdog/s3c2410_wdt.c | 41 ++++++++++++++++++++++++++++++----
>  1 file changed, 37 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c
> index 6db22f2e3a4f..0dbb3ec9c29c 100644
> --- a/drivers/watchdog/s3c2410_wdt.c
> +++ b/drivers/watchdog/s3c2410_wdt.c
> @@ -60,9 +60,13 @@
>  #define EXYNOS850_CLUSTER0_NONCPU_INT_EN	0x1244
>  #define EXYNOS850_CLUSTER1_NONCPU_OUT		0x1620
>  #define EXYNOS850_CLUSTER1_NONCPU_INT_EN	0x1644
> +#define EXYNOSAUTOV9_CLUSTER1_NONCPU_OUT	0x1520
> +#define EXYNOSAUTOV9_CLUSTER1_NONCPU_INT_EN	0x1544
>  
>  #define EXYNOS850_CLUSTER0_WDTRESET_BIT		24
>  #define EXYNOS850_CLUSTER1_WDTRESET_BIT		23
> +#define EXYNOSAUTOV9_CLUSTER0_WDTRESET_BIT	25
> +#define EXYNOSAUTOV9_CLUSTER1_WDTRESET_BIT	24
>  
>  /**
>   * DOC: Quirk flags for different Samsung watchdog IP-cores
> @@ -236,6 +240,30 @@ static const struct s3c2410_wdt_variant drv_data_exynos850_cl1 = {
>  		  QUIRK_HAS_PMU_RST_STAT | QUIRK_HAS_PMU_CNT_EN,
>  };
>  
> +static const struct s3c2410_wdt_variant drv_data_exynosautov9_cl0 = {
> +	.mask_reset_reg = EXYNOS850_CLUSTER0_NONCPU_INT_EN,
> +	.mask_bit = 2,
> +	.mask_reset_inv = true,
> +	.rst_stat_reg = EXYNOS5_RST_STAT_REG_OFFSET,
> +	.rst_stat_bit = EXYNOSAUTOV9_CLUSTER0_WDTRESET_BIT,
> +	.cnt_en_reg = EXYNOS850_CLUSTER0_NONCPU_OUT,
> +	.cnt_en_bit = 7,
> +	.quirks = QUIRK_HAS_WTCLRINT_REG | QUIRK_HAS_PMU_MASK_RESET |
> +		  QUIRK_HAS_PMU_RST_STAT | QUIRK_HAS_PMU_CNT_EN,
> +};
> +
> +static const struct s3c2410_wdt_variant drv_data_exynosautov9_cl1 = {
> +	.mask_reset_reg = EXYNOSAUTOV9_CLUSTER1_NONCPU_INT_EN,
> +	.mask_bit = 2,
> +	.mask_reset_inv = true,
> +	.rst_stat_reg = EXYNOS5_RST_STAT_REG_OFFSET,
> +	.rst_stat_bit = EXYNOSAUTOV9_CLUSTER1_WDTRESET_BIT,
> +	.cnt_en_reg = EXYNOSAUTOV9_CLUSTER1_NONCPU_OUT,
> +	.cnt_en_bit = 7,
> +	.quirks = QUIRK_HAS_WTCLRINT_REG | QUIRK_HAS_PMU_MASK_RESET |
> +		  QUIRK_HAS_PMU_RST_STAT | QUIRK_HAS_PMU_CNT_EN,
> +};
> +
>  static const struct of_device_id s3c2410_wdt_match[] = {
>  	{ .compatible = "samsung,s3c2410-wdt",
>  	  .data = &drv_data_s3c2410 },
> @@ -249,6 +277,8 @@ static const struct of_device_id s3c2410_wdt_match[] = {
>  	  .data = &drv_data_exynos7 },
>  	{ .compatible = "samsung,exynos850-wdt",
>  	  .data = &drv_data_exynos850_cl0 },
> +	{ .compatible = "samsung,exynosautov9-wdt",
> +	  .data = &drv_data_exynosautov9_cl0 },
>  	{},
>  };
>  MODULE_DEVICE_TABLE(of, s3c2410_wdt_match);
> @@ -630,8 +660,9 @@ s3c2410_get_wdt_drv_data(struct platform_device *pdev)
>  	}
>  
>  #ifdef CONFIG_OF
> -	/* Choose Exynos850 driver data w.r.t. cluster index */
> -	if (variant == &drv_data_exynos850_cl0) {
> +	/* Choose Exynos850/ExynosAutov9 driver data w.r.t. cluster index */
> +	if (variant == &drv_data_exynos850_cl0 ||
> +	    variant == &drv_data_exynosautov9_cl0) {
>  		u32 index;
>  		int err;
>  
> @@ -644,9 +675,11 @@ s3c2410_get_wdt_drv_data(struct platform_device *pdev)
>  
>  		switch (index) {
>  		case 0:
> -			return &drv_data_exynos850_cl0;
> +			return variant;
>  		case 1:
> -			return &drv_data_exynos850_cl1;
> +			return (variant == &drv_data_exynos850_cl0) ?
> +				&drv_data_exynos850_cl1 :
> +				&drv_data_exynosautov9_cl1;
>  		default:
>  			dev_err(dev, "wrong cluster index: %u\n", index);
>  			return NULL;