diff mbox series

[U-Boot,16/20] serial: 16550: allow the driver to support MediaTek serial

Message ID ed6cd147dd628fa30748f62a063849433fe6254b.1538460580.git.ryder.lee@mediatek.com
State Changes Requested
Delegated to: Tom Rini
Headers show
Series Add support for MediaTek SoCs - MT7623n / MT7629 | expand

Commit Message

Ryder Lee Oct. 2, 2018, 6:13 a.m. UTC 
MediaTek UARTs has a highspeed register which influences the calcualtion
of the divisor. This patch adds an extra control in ns16550.c to suuport
MediaTek SoCs.

Note that we don't support the baudrate larger than 115200 currently.

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
---
 drivers/serial/ns16550.c | 10 ++++++++++
 1 file changed, 10 insertions(+)
diff mbox series

Patch

diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index f9041aa..f5410af 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -148,6 +148,13 @@  int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate)
 
 static void NS16550_setbrg(NS16550_t com_port, int baud_divisor)
 {
+#ifdef CONFIG_ARCH_MEDIATEK
+	/*
+	 * MediaTek UARTs has an extra highspeed register.
+	 * We need to clear it if baudrate <= 115200.
+	 */
+	serial_out(0, &com_port->reg9);
+#endif
 	serial_out(UART_LCR_BKSE | UART_LCRVAL, &com_port->lcr);
 	serial_out(baud_divisor & 0xff, &com_port->dll);
 	serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm);
@@ -261,6 +268,9 @@  static inline void _debug_uart_init(void)
 	serial_dout(&com_port->mcr, UART_MCRVAL);
 	serial_dout(&com_port->fcr, UART_FCR_DEFVAL);
 
+#ifdef CONFIG_ARCH_MEDIATEK
+	serial_dout(&com_port->reg9, 0);
+#endif
 	serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL);
 	serial_dout(&com_port->dll, baud_divisor & 0xff);
 	serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff);