| Message ID | CAFULd4Zj73uzoLHLKuPgRpZhpXau27x3UA3rtGSmBczsA0xP5A@mail.gmail.com |
|---|---|
| State | New |
| Headers | show |
| Series | [combine] : Fix PR84123: internal compiler error: in gen_rtx_SUBREG, at emit-rtl.c | expand |
Hi! On Wed, Jan 31, 2018 at 08:47:08PM +0100, Uros Bizjak wrote: > We should skip RTXes that will result in certain ICE here, and this is > what the attached patch does. > > 2018-01-31 Uros Bizjak <ubizjak@gmail.com> > > PR target/84123 > * combine.c (change_zero_ext): Check if hard register satisfies > can_change_dest_mode before calling gen_lowpart_SUBREG. > > Patch was bootstrapped and regression tested on alphaev68-linux-gnu > (native bootstrap) and x86_64-linux-gnu {,-m32}. > > OK for mainline and backports? Okay for trunk, and backports too. Thanks! Segher
On 01/31/2018 10:33 PM, Segher Boessenkool wrote: > Hi! > > On Wed, Jan 31, 2018 at 08:47:08PM +0100, Uros Bizjak wrote: >> We should skip RTXes that will result in certain ICE here, and this is >> what the attached patch does. >> >> 2018-01-31 Uros Bizjak <ubizjak@gmail.com> >> >> PR target/84123 >> * combine.c (change_zero_ext): Check if hard register satisfies >> can_change_dest_mode before calling gen_lowpart_SUBREG. >> >> Patch was bootstrapped and regression tested on alphaev68-linux-gnu >> (native bootstrap) and x86_64-linux-gnu {,-m32}. >> >> OK for mainline and backports? > > Okay for trunk, and backports too. Thanks! > I'm running into an ICE here for nvptx, because "HARD_REGISTER_P (x)" expects x to be a REG, but actually it's an lshiftrt: ... gdb) #7 change_zero_ext (pat=pat@entry=0x7ffff690a5a0) at combine.c:11486 11486 if (HARD_REGISTER_P (x) (gdb) call debug_rtx (x) (lshiftrt:HI (mem/j:HI (plus:DI (reg/v/f:DI 31 [ r ]) (const_int 242 [0xf2])) [11 r_9(D)->_new._reent._r48._seed+2 S2 A16]) (const_int 1 [0x1])) ... Thanks, - Tom
diff --git a/gcc/combine.c b/gcc/combine.c index 6adc0a7d6f8..c59c2156fa1 100644 --- a/gcc/combine.c +++ b/gcc/combine.c @@ -11480,8 +11480,15 @@ change_zero_ext (rtx pat) gen_int_shift_amount (inner_mode, start)); else x = XEXP (x, 0); + if (mode != inner_mode) - x = gen_lowpart_SUBREG (mode, x); + { + if (HARD_REGISTER_P (x) + && !can_change_dest_mode (x, 0, mode)) + continue; + + x = gen_lowpart_SUBREG (mode, x); + } } else if (GET_CODE (x) == ZERO_EXTEND && GET_CODE (XEXP (x, 0)) == SUBREG @@ -11493,7 +11500,13 @@ change_zero_ext (rtx pat) size = GET_MODE_PRECISION (inner_mode); x = SUBREG_REG (XEXP (x, 0)); if (GET_MODE (x) != mode) - x = gen_lowpart_SUBREG (mode, x); + { + if (HARD_REGISTER_P (x) + && !can_change_dest_mode (x, 0, mode)) + continue; + + x = gen_lowpart_SUBREG (mode, x); + } } else if (GET_CODE (x) == ZERO_EXTEND && REG_P (XEXP (x, 0))
Hello! As shown in the PR, alpha specific testcase hits the above ICE when combine pass is trying to simplify: (insn 13 12 16 2 (set (reg:SI 141 [ ID ]) (zero_extend:SI (subreg:QI (reg:DI 48 $f16 [ ID ]) 0))) 48 {zero_extendqisi2} via change_zero_ext (combine.c): 11486 else if (GET_CODE (x) == ZERO_EXTEND 11487 && GET_CODE (XEXP (x, 0)) == SUBREG 11488 && SCALAR_INT_MODE_P (GET_MODE (SUBREG_REG (XEXP (x, 0)))) 11489 && !paradoxical_subreg_p (XEXP (x, 0)) 11490 && subreg_lowpart_p (XEXP (x, 0))) 11491 { 11492 inner_mode = as_a <scalar_int_mode> (GET_MODE (XEXP (x, 0))); 11493 size = GET_MODE_PRECISION (inner_mode); 11494 x = SUBREG_REG (XEXP (x, 0)); 11495 if (GET_MODE (x) != mode) 11496 x = gen_lowpart_SUBREG (mode, x); 11497 } This won't work when x in line 11496 is a hard register and mode is unsupported with targetm.hard_regno_mode_ok. (gdb) p debug_rtx (x) (reg:DI 48 $f16 [ ID ]) $1 = void (gdb) p mode $2 = {m_mode = E_SImode} (which in case of alpha is defined as: --cut here-- /* Implement TARGET_HARD_REGNO_MODE_OK. On Alpha, the integer registers can hold any mode. The floating-point registers can hold 64-bit integers as well, but not smaller values. */ static bool alpha_hard_regno_mode_ok (unsigned int regno, machine_mode mode) { if (IN_RANGE (regno, 32, 62)) return (mode == SFmode || mode == DFmode || mode == DImode || mode == SCmode || mode == DCmode); return true; } --cut here-- We should skip RTXes that will result in certain ICE here, and this is what the attached patch does. 2018-01-31 Uros Bizjak <ubizjak@gmail.com> PR target/84123 * combine.c (change_zero_ext): Check if hard register satisfies can_change_dest_mode before calling gen_lowpart_SUBREG. Patch was bootstrapped and regression tested on alphaev68-linux-gnu (native bootstrap) and x86_64-linux-gnu {,-m32}. OK for mainline and backports? Uros.