| Message ID | 1515209665-615-1-git-send-email-sumit.garg@nxp.com |
|---|---|
| State | Accepted |
| Commit | dcb081ba953dcfda54d56a7633a6daf029b87b24 |
| Delegated to: | York Sun |
| Headers | show
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Ip=[192.88.168.50]; Helo=[tx30smr01.am.freescale.net] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY1PR03MB2364 Cc: ruchika.gupta@nxp.com Subject: [U-Boot] [PATCH v2 1/3] armv8: fsl-layerscape: SPL size reduction X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion <u-boot.lists.denx.de> List-Unsubscribe: <https://lists.denx.de/options/u-boot>, <mailto:u-boot-request@lists.denx.de?subject=unsubscribe> List-Archive: <http://lists.denx.de/pipermail/u-boot/> List-Post: <mailto:u-boot@lists.denx.de> List-Help: <mailto:u-boot-request@lists.denx.de?subject=help> List-Subscribe: <https://lists.denx.de/listinfo/u-boot>, <mailto:u-boot-request@lists.denx.de?subject=subscribe> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" <u-boot-bounces@lists.denx.de> |
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[U-Boot,v2,1/3] armv8: fsl-layerscape: SPL size reduction
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On 01/05/2018 08:00 AM, Sumit Garg wrote: > Compile-off mp.c and libfdt.c in case of SPL build. SPL size reduces > by approx 2k. > > Signed-off-by: Sumit Garg <sumit.garg@nxp.com> > --- > > Changes in v2: > Removed code specific to D-Cache off. With GCC 6.2 tool-chain, able > to reduce size to 79K. Applied to fsl-qoriq master. Thanks. York
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Makefile b/arch/arm/cpu/armv8/fsl-layerscape/Makefile index 115c3fc..0cb6d4e 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Makefile +++ b/arch/arm/cpu/armv8/fsl-layerscape/Makefile @@ -7,8 +7,10 @@ obj-y += cpu.o obj-y += lowlevel.o obj-y += soc.o +ifndef CONFIG_SPL_BUILD obj-$(CONFIG_MP) += mp.o obj-$(CONFIG_OF_LIBFDT) += fdt.o +endif obj-$(CONFIG_SPL) += spl.o obj-$(CONFIG_$(SPL_)FSL_LS_PPA) += ppa.o
Compile-off mp.c and libfdt.c in case of SPL build. SPL size reduces by approx 2k. Signed-off-by: Sumit Garg <sumit.garg@nxp.com> --- Changes in v2: Removed code specific to D-Cache off. With GCC 6.2 tool-chain, able to reduce size to 79K. arch/arm/cpu/armv8/fsl-layerscape/Makefile | 2 ++ 1 file changed, 2 insertions(+)