diff mbox

[U-Boot,3/7] SECURE_BOOT: Enable chain of trust on LS1046A platform

Message ID 1490257100-16483-4-git-send-email-sumit.garg@nxp.com
State Accepted
Delegated to: York Sun
Headers show

Commit Message

Sumit Garg March 23, 2017, 8:18 a.m. UTC
From: Vinitha Pillai-B57223 <vinitha.pillai@nxp.com>

Define bootscript and its header addresses for QSPI target. Also
define PPA header address to enable PPA validation.

Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
---
 arch/arm/cpu/armv8/fsl-layerscape/Kconfig         |  1 +
 arch/arm/include/asm/arch-fsl-layerscape/config.h |  2 +-
 arch/arm/include/asm/fsl_secure_boot.h            | 18 ++++++++++++++----
 3 files changed, 16 insertions(+), 5 deletions(-)

Comments

York Sun March 29, 2017, 4:45 p.m. UTC | #1
On 03/23/2017 01:19 AM, Sumit Garg wrote:
> From: Vinitha Pillai-B57223 <vinitha.pillai@nxp.com>
>
> Define bootscript and its header addresses for QSPI target. Also
> define PPA header address to enable PPA validation.
>
> Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
> Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
> ---
>  arch/arm/cpu/armv8/fsl-layerscape/Kconfig         |  1 +
>  arch/arm/include/asm/arch-fsl-layerscape/config.h |  2 +-
>  arch/arm/include/asm/fsl_secure_boot.h            | 18 ++++++++++++++----
>  3 files changed, 16 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
> index 10efb8c..fbb6642 100644
> --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
> @@ -159,6 +159,7 @@ config SYS_LS_PPA_ESBC_ADDR
>  	hex "hdr address of PPA firmware loading from"
>  	depends on FSL_LS_PPA && CHAIN_OF_TRUST
>  	default 0x600c0000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1043A
> +	default 0x40740000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1046A

Why isn't the offset consistent?

>  	help
>  	  If the PPA header firmware locate at XIP flash, such as NOR or
>  	  QSPI flash, this address is a directly memory-mapped.
> diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h
> index b5b08aa..1f22afd 100644
> --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
> +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
> @@ -199,7 +199,7 @@
>
>  #define CONFIG_SYS_FSL_IFC_BE
>  #define CONFIG_SYS_FSL_SFP_VER_3_2
> -#define CONFIG_SYS_FSL_SNVS_LE
> +#define CONFIG_SYS_FSL_SEC_MON_BE
>  #define CONFIG_SYS_FSL_SFP_BE
>  #define CONFIG_SYS_FSL_SRK_LE
>  #define CONFIG_KEY_REVOCATION
> diff --git a/arch/arm/include/asm/fsl_secure_boot.h b/arch/arm/include/asm/fsl_secure_boot.h
> index a1a3004..423c2c4 100644
> --- a/arch/arm/include/asm/fsl_secure_boot.h
> +++ b/arch/arm/include/asm/fsl_secure_boot.h
> @@ -46,9 +46,10 @@
>
>  #endif
>
> -#if defined(CONFIG_LS1043A) || defined(CONFIG_LS2080A)
> -/* For LS1043 (ARMv8), ESBC image Address in Header is 64 bit
> - * Similiarly for LS2080
> +#if defined(CONFIG_FSL_LAYERSCAPE)
> +/*
> + * For fsl layerscape based platforms, ESBC image Address in Header
> + * is 64 bit.
>   */
>  #define CONFIG_ESBC_ADDR_64BIT
>  #endif
> @@ -90,12 +91,21 @@
>  #define CONFIG_BS_ADDR_DEVICE		0x00000940
>  #define CONFIG_BS_HDR_SIZE		0x00000010
>  #define CONFIG_BS_SIZE			0x00000008
> +#elif defined(CONFIG_QSPI_BOOT)
> +#ifdef CONFIG_ARCH_LS1046A
> +#define CONFIG_BS_HDR_ADDR_DEVICE	0x40780000
> +#define CONFIG_BS_ADDR_DEVICE		0x40800000
>  #else
> +#error "Platform not supported"
> +#endif
> +#define CONFIG_BS_HDR_SIZE		0x00002000
> +#define CONFIG_BS_SIZE			0x00001000
> +#else /* Default NOR Boot */
>  #define CONFIG_BS_HDR_ADDR_DEVICE	0x600a0000
>  #define CONFIG_BS_ADDR_DEVICE		0x60060000
>  #define CONFIG_BS_HDR_SIZE		0x00002000
>  #define CONFIG_BS_SIZE			0x00001000
> -#endif /* #ifdef CONFIG_SD_BOOT */
> +#endif
>  #define CONFIG_BS_HDR_ADDR_RAM		0x81000000
>  #define CONFIG_BS_ADDR_RAM		0x81020000
>  #endif
>

Please consider to move these to Kconfig in the future.

York
Sumit Garg March 29, 2017, 5 p.m. UTC | #2
> -----Original Message-----
> From: york sun
> Sent: Wednesday, March 29, 2017 10:16 PM
> To: Sumit Garg <sumit.garg@nxp.com>; u-boot@lists.denx.de
> Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>; Ruchika Gupta
> <ruchika.gupta@nxp.com>; Vini Pillai <vinitha.pillai@nxp.com>
> Subject: Re: [u-boot-release] [PATCH 3/7] SECURE_BOOT: Enable chain of trust
> on LS1046A platform
> 
> On 03/23/2017 01:19 AM, Sumit Garg wrote:
> > From: Vinitha Pillai-B57223 <vinitha.pillai@nxp.com>
> >
> > Define bootscript and its header addresses for QSPI target. Also
> > define PPA header address to enable PPA validation.
> >
> > Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
> > Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
> > ---
> >  arch/arm/cpu/armv8/fsl-layerscape/Kconfig         |  1 +
> >  arch/arm/include/asm/arch-fsl-layerscape/config.h |  2 +-
> >  arch/arm/include/asm/fsl_secure_boot.h            | 18 ++++++++++++++----
> >  3 files changed, 16 insertions(+), 5 deletions(-)
> >
> > diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
> > b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
> > index 10efb8c..fbb6642 100644
> > --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
> > +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
> > @@ -159,6 +159,7 @@ config SYS_LS_PPA_ESBC_ADDR
> >  	hex "hdr address of PPA firmware loading from"
> >  	depends on FSL_LS_PPA && CHAIN_OF_TRUST
> >  	default 0x600c0000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1043A
> > +	default 0x40740000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1046A
> 
> Why isn't the offset consistent?
> 
> >  	help
> >  	  If the PPA header firmware locate at XIP flash, such as NOR or
> >  	  QSPI flash, this address is a directly memory-mapped.
> > diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h
> > b/arch/arm/include/asm/arch-fsl-layerscape/config.h
> > index b5b08aa..1f22afd 100644
> > --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
> > +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
> > @@ -199,7 +199,7 @@
> >
> >  #define CONFIG_SYS_FSL_IFC_BE
> >  #define CONFIG_SYS_FSL_SFP_VER_3_2
> > -#define CONFIG_SYS_FSL_SNVS_LE
> > +#define CONFIG_SYS_FSL_SEC_MON_BE
> >  #define CONFIG_SYS_FSL_SFP_BE
> >  #define CONFIG_SYS_FSL_SRK_LE
> >  #define CONFIG_KEY_REVOCATION
> > diff --git a/arch/arm/include/asm/fsl_secure_boot.h
> > b/arch/arm/include/asm/fsl_secure_boot.h
> > index a1a3004..423c2c4 100644
> > --- a/arch/arm/include/asm/fsl_secure_boot.h
> > +++ b/arch/arm/include/asm/fsl_secure_boot.h
> > @@ -46,9 +46,10 @@
> >
> >  #endif
> >
> > -#if defined(CONFIG_LS1043A) || defined(CONFIG_LS2080A)
> > -/* For LS1043 (ARMv8), ESBC image Address in Header is 64 bit
> > - * Similiarly for LS2080
> > +#if defined(CONFIG_FSL_LAYERSCAPE)
> > +/*
> > + * For fsl layerscape based platforms, ESBC image Address in Header
> > + * is 64 bit.
> >   */
> >  #define CONFIG_ESBC_ADDR_64BIT
> >  #endif
> > @@ -90,12 +91,21 @@
> >  #define CONFIG_BS_ADDR_DEVICE		0x00000940
> >  #define CONFIG_BS_HDR_SIZE		0x00000010
> >  #define CONFIG_BS_SIZE			0x00000008
> > +#elif defined(CONFIG_QSPI_BOOT)
> > +#ifdef CONFIG_ARCH_LS1046A
> > +#define CONFIG_BS_HDR_ADDR_DEVICE	0x40780000
> > +#define CONFIG_BS_ADDR_DEVICE		0x40800000
> >  #else
> > +#error "Platform not supported"
> > +#endif
> > +#define CONFIG_BS_HDR_SIZE		0x00002000
> > +#define CONFIG_BS_SIZE			0x00001000
> > +#else /* Default NOR Boot */
> >  #define CONFIG_BS_HDR_ADDR_DEVICE	0x600a0000
> >  #define CONFIG_BS_ADDR_DEVICE		0x60060000
> >  #define CONFIG_BS_HDR_SIZE		0x00002000
> >  #define CONFIG_BS_SIZE			0x00001000
> > -#endif /* #ifdef CONFIG_SD_BOOT */
> > +#endif
> >  #define CONFIG_BS_HDR_ADDR_RAM		0x81000000
> >  #define CONFIG_BS_ADDR_RAM		0x81020000
> >  #endif
> >
> 
> Please consider to move these to Kconfig in the future.
> 
> York

Sure we will move these macros to Kconfig.

Sumit
diff mbox

Patch

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 10efb8c..fbb6642 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -159,6 +159,7 @@  config SYS_LS_PPA_ESBC_ADDR
 	hex "hdr address of PPA firmware loading from"
 	depends on FSL_LS_PPA && CHAIN_OF_TRUST
 	default 0x600c0000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1043A
+	default 0x40740000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1046A
 	help
 	  If the PPA header firmware locate at XIP flash, such as NOR or
 	  QSPI flash, this address is a directly memory-mapped.
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index b5b08aa..1f22afd 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -199,7 +199,7 @@ 
 
 #define CONFIG_SYS_FSL_IFC_BE
 #define CONFIG_SYS_FSL_SFP_VER_3_2
-#define CONFIG_SYS_FSL_SNVS_LE
+#define CONFIG_SYS_FSL_SEC_MON_BE
 #define CONFIG_SYS_FSL_SFP_BE
 #define CONFIG_SYS_FSL_SRK_LE
 #define CONFIG_KEY_REVOCATION
diff --git a/arch/arm/include/asm/fsl_secure_boot.h b/arch/arm/include/asm/fsl_secure_boot.h
index a1a3004..423c2c4 100644
--- a/arch/arm/include/asm/fsl_secure_boot.h
+++ b/arch/arm/include/asm/fsl_secure_boot.h
@@ -46,9 +46,10 @@ 
 
 #endif
 
-#if defined(CONFIG_LS1043A) || defined(CONFIG_LS2080A)
-/* For LS1043 (ARMv8), ESBC image Address in Header is 64 bit
- * Similiarly for LS2080
+#if defined(CONFIG_FSL_LAYERSCAPE)
+/*
+ * For fsl layerscape based platforms, ESBC image Address in Header
+ * is 64 bit.
  */
 #define CONFIG_ESBC_ADDR_64BIT
 #endif
@@ -90,12 +91,21 @@ 
 #define CONFIG_BS_ADDR_DEVICE		0x00000940
 #define CONFIG_BS_HDR_SIZE		0x00000010
 #define CONFIG_BS_SIZE			0x00000008
+#elif defined(CONFIG_QSPI_BOOT)
+#ifdef CONFIG_ARCH_LS1046A
+#define CONFIG_BS_HDR_ADDR_DEVICE	0x40780000
+#define CONFIG_BS_ADDR_DEVICE		0x40800000
 #else
+#error "Platform not supported"
+#endif
+#define CONFIG_BS_HDR_SIZE		0x00002000
+#define CONFIG_BS_SIZE			0x00001000
+#else /* Default NOR Boot */
 #define CONFIG_BS_HDR_ADDR_DEVICE	0x600a0000
 #define CONFIG_BS_ADDR_DEVICE		0x60060000
 #define CONFIG_BS_HDR_SIZE		0x00002000
 #define CONFIG_BS_SIZE			0x00001000
-#endif /* #ifdef CONFIG_SD_BOOT */
+#endif
 #define CONFIG_BS_HDR_ADDR_RAM		0x81000000
 #define CONFIG_BS_ADDR_RAM		0x81020000
 #endif