| Message ID | 1473046570-13795-1-git-send-email-siarhei.siamashka@gmail.com |
|---|---|
| State | Accepted |
| Commit | 22a402f00c9de841026105baa219a03d2273c01c |
| Delegated to: | Tom Rini |
| Headers | show |
On Mon, Sep 05, 2016 at 06:36:10AM +0300, Siarhei Siamashka wrote: > The SPL and U-Boot proper may use different initial stack > locations, which are configured via CONFIG_SPL_STACK and > CONFIG_SYS_INIT_SP_ADDR defines. The lowlevel_init.S > code needs to handle this in the same way as crt0.S > > Without this fix, setting the U-Boot stack location to some > place, which is not safely accessible by the SPL (such as > the DRAM), causes a very early SPL deadlock. > > Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
On 4 September 2016 at 21:36, Siarhei Siamashka <siarhei.siamashka@gmail.com> wrote: > The SPL and U-Boot proper may use different initial stack > locations, which are configured via CONFIG_SPL_STACK and > CONFIG_SYS_INIT_SP_ADDR defines. The lowlevel_init.S > code needs to handle this in the same way as crt0.S > > Without this fix, setting the U-Boot stack location to some > place, which is not safely accessible by the SPL (such as > the DRAM), causes a very early SPL deadlock. > > Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> > --- > arch/arm/cpu/armv7/lowlevel_init.S | 4 ++++ > 1 file changed, 4 insertions(+) Reviewed-by: Simon Glass <sjg@chromium.org>
On Mon, Sep 05, 2016 at 06:36:10AM +0300, Siarhei Siamashka wrote: > The SPL and U-Boot proper may use different initial stack > locations, which are configured via CONFIG_SPL_STACK and > CONFIG_SYS_INIT_SP_ADDR defines. The lowlevel_init.S > code needs to handle this in the same way as crt0.S > > Without this fix, setting the U-Boot stack location to some > place, which is not safely accessible by the SPL (such as > the DRAM), causes a very early SPL deadlock. > > Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> > Reviewed-by: Tom Rini <trini@konsulko.com> > Reviewed-by: Simon Glass <sjg@chromium.org> Applied to u-boot/master, thanks!
diff --git a/arch/arm/cpu/armv7/lowlevel_init.S b/arch/arm/cpu/armv7/lowlevel_init.S index 1872c57..658934d 100644 --- a/arch/arm/cpu/armv7/lowlevel_init.S +++ b/arch/arm/cpu/armv7/lowlevel_init.S @@ -19,7 +19,11 @@ ENTRY(lowlevel_init) /* * Setup a temporary stack. Global data is not available yet. */ +#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK) + ldr sp, =CONFIG_SPL_STACK +#else ldr sp, =CONFIG_SYS_INIT_SP_ADDR +#endif bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ #ifdef CONFIG_SPL_DM mov r9, #0
The SPL and U-Boot proper may use different initial stack locations, which are configured via CONFIG_SPL_STACK and CONFIG_SYS_INIT_SP_ADDR defines. The lowlevel_init.S code needs to handle this in the same way as crt0.S Without this fix, setting the U-Boot stack location to some place, which is not safely accessible by the SPL (such as the DRAM), causes a very early SPL deadlock. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> --- arch/arm/cpu/armv7/lowlevel_init.S | 4 ++++ 1 file changed, 4 insertions(+)