Message ID | 1547830785-7079-1-git-send-email-aleksandar.markovic@rt-rk.com |
---|---|
State | New |
Headers | show |
On Fri, 18 Jan 2019 at 16:59, Aleksandar Markovic <aleksandar.markovic@rt-rk.com> wrote: > > From: Aleksandar Markovic <amarkovic@wavecomp.com> > > The following changes since commit 681d61362d3f766a00806b89d6581869041f73cb: > > Merge remote-tracking branch 'remotes/jnsnow/tags/bitmaps-pull-request' into staging (2019-01-17 12:48:42 +0000) > > are available in the git repository at: > > https://github.com/AMarkovic/qemu tags/mips-queue-january-17-2019-v2 > > for you to fetch changes up to a168a796e1c251787fcdf2d9ca1e9e69cb86ffcd: > > target/mips: Introduce 32 R5900 multimedia registers (2019-01-18 16:53:28 +0100) > > ---------------------------------------------------------------- > > MIPS queue for January 17, 2019 - v2 > > v1->v2: > - fixed "make check" error > > content: > - provide access to configuration registers SAARI, SAAR, and > MemoryMapID > - update Inter-Thread Communication Unit > - CP0-related cleanups > - introduce R5900 multimedia registers > > ---------------------------------------------------------------- Applied, thanks. Please update the changelog at https://wiki.qemu.org/ChangeLog/4.0 for any user-visible changes. -- PMM
From: Aleksandar Markovic <amarkovic@wavecomp.com> The following changes since commit 681d61362d3f766a00806b89d6581869041f73cb: Merge remote-tracking branch 'remotes/jnsnow/tags/bitmaps-pull-request' into staging (2019-01-17 12:48:42 +0000) are available in the git repository at: https://github.com/AMarkovic/qemu tags/mips-queue-january-17-2019-v2 for you to fetch changes up to a168a796e1c251787fcdf2d9ca1e9e69cb86ffcd: target/mips: Introduce 32 R5900 multimedia registers (2019-01-18 16:53:28 +0100) ---------------------------------------------------------------- MIPS queue for January 17, 2019 - v2 v1->v2: - fixed "make check" error content: - provide access to configuration registers SAARI, SAAR, and MemoryMapID - update Inter-Thread Communication Unit - CP0-related cleanups - introduce R5900 multimedia registers ---------------------------------------------------------------- Aleksandar Markovic (6): target/mips: Move comment containing summary of CP0 registers target/mips: Add preprocessor constants for 32 major CP0 registers target/mips: Use preprocessor constants for 32 major CP0 registers target/mips: Amend preprocessor constants for CP0 registers target/mips: Add CP0 register MemoryMapID target/mips: Rename 'rn' to 'register_name' Fredrik Noring (1): target/mips: Introduce 32 R5900 multimedia registers Yongbok Kim (5): target/mips: Add fields for SAARI and SAAR CP0 registers target/mips: Provide R/W access to SAARI and SAAR CP0 registers target/mips: Add field and R/W access to ITU control register ICR0 target/mips: Update ITU to utilize SAARI and SAAR CP0 registers target/mips: Update ITU to handle bus errors hw/mips/cps.c | 8 + hw/misc/mips_itu.c | 73 ++- include/hw/misc/mips_itu.h | 8 + target/mips/cpu.h | 331 +++++++++--- target/mips/helper.h | 6 + target/mips/internal.h | 1 + target/mips/machine.c | 7 +- target/mips/op_helper.c | 64 +++ target/mips/translate.c | 1192 +++++++++++++++++++++++--------------------- 9 files changed, 1042 insertions(+), 648 deletions(-)